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參數(shù)資料
| 型號： | KIT33742DWEVB |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 27/71頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT FOR 33742 SBC WITH EHSCAN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，CAN 控制器 |
| 已用 IC / 零件： | MC33742 |
| 相關(guān)產(chǎn)品： | MC33742DW-ND - IC SYSTEM BASE W/LIN 28-SOIC MC33742DWR2-ND - IC SYSTEM BASE W/LIN 28-SOIC MC33742SDW-ND - IC SYSTEM BASE W/LIN 28-SOIC MC33742SDWR2-ND - IC SYSTEM BASE W/LIN 28-SOIC |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
33
33742
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Figure 13. SBC State Diagram (Not Valid in Debug Modes)
Figure 14. Operation After SBC Power-up
Notes
43.
These two SPI commands must be sent consecutively in this sequence.
44.
If watchdog activated.
W
at
ch
do
g:
Tr
igg
er
(VDD High Temperature OR [VDD Low > 100 ms & VSUP > BFew]) & Nostop &!BATFAIL
Watchdog: Timeout & Nostop &!BATFAIL
Power
Down
Reset
Normal Request
Stop
Sleep
Reset Counter (3.4 ms)
Expired
33742S
Po
w
er-
VDD Low OR Watchdog:
Timeout 350 ms & Nostop
1
W
a
ke-up
SPI: Standby and
Watchdog Trigger
3
SPI
:S
tandb
y
S
P
I:No
rm
a
l
SPI: Stop & CS
LOW to HIGH
Transition
SPI:
S
top
& C
S
Lo
w to
Hi
gh
T
ra
ns
ition
4
2
Watchdog: Timeout OR VDD Low
No
st
op
and
SPI
:
Sle
ep
&
CS
LO
W
to
HI
GH
Nosto
p
an
d
SPI
:Slee
p
&
CS
LOW
to
HI
GH
T
ran
si
tion
1
Watchdog: Timeout OR VDD Low
1
2
W
atc
hd
og
: T
im
eo
ut O
R
V
DD
Lo
w (4
1
Wake-Up
1
2
3
4 Denotes priority
State Machine Description
Nostop = Nostop bit = 1
!Nostop = Nostop bit = 0
BATFAIL = Batfail bit = 1
!BATFAIL = Batfail bit = 0
VDD Over-temperature = VDD thermal shutdown occurs
VDD LOW = VDD below reset threshold
VDD LOW > 100 ms = VDD below reset threshold for more than 100 ms
Watchdog: Trigger = TIM1 subregister write operation
VSUP > BFew = VSUP > Battery Fail Early Warning (6.1 V typical)
Watchdog: Timeout = TIM1 register not written before watchdog timeout period
expired, or watchdog written in incorrect time window if watchdog window
selected (except Stop mode). In Normal Request mode, timeout is 355 ms
p2.2 (350 ms p3) ms.
SPI: Sleep = SPI write command to MCR register, data sleep
SPI: Stop = SPI write command to MCR register, data stop
SPI: Normal = SPI write command to MCR register, data normal
SPI: Standby = SPI write command to MCR register, data standby
Normal
Standby
Power-up
Reset
Normal
Request
Normal
Trigger
Batfail
No Stop
Sleep
No
Yes
No
Yes
Operation after power-up if no trigger appears
Operation after reset of BATFAIL if no trigger appears
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