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參數(shù)資料
| 型號： | KAD5514P-12Q72 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 19/34頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 125MSPS SGL 72-QFN |
| 產(chǎn)品培訓(xùn)模塊： | High-Speed Analog-to-Digital Converters |
| 標(biāo)準包裝： | 1 |
| 系列： | FemtoCharge™ |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 125M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 376mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 72-QFN（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個差分，單極 |
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26
FN6804.2
September 10, 2009
ADDRESS 0X73: OUTPUT_MODE_A
The output_mode_A register controls the physical output
format of the data, as well as the logical coding. The
KAD5514P can present output data in two physical formats:
LVDS or LVCMOS. Additionally, the drive strength in LVDS
mode can be set high (3mA) or low (2mA). By default, the
tri-level OUTMODE pin selects the mode and drive level (refer
to “Digital Outputs” on page 20). This functionality can be
overridden and controlled through the SPI, as shown in
Table 12.
Data can be coded in three possible formats: two’s
complement, Gray code or offset binary. By default, the
tri-level OUTFMT pin selects the data format (refer to “Data
Format” on page 21). This functionality can be overridden
and controlled through the SPI, as shown in Table 13.
This register is not changed by a Soft Reset.
ADDRESS 0X74: OUTPUT_MODE_B
ADDRESS 0X75: CONFIG_STATUS
Bit 6 DLL Range
This bit sets the DLL operating range to fast (default) or
slow.
Bit 4 DDR Enable
Setting this bit enables Double Data-Rate mode.
Internal clock signals are generated by a delay-locked loop
(DLL), which has a finite operating range. Table 14 shows
the allowable sample rate ranges for the slow and fast
settings.
The output_mode_B and config_status registers are used in
conjunction to enable DDR mode and select the frequency
range of the DLL clock generator. The method of setting
these options is different from the other registers.
The procedure for setting output_mode_B is shown in
Figure 42. Read the contents of output_mode_B and
config_status and XOR them. Then XOR this result with the
desired value for output_mode_B and write that XOR result
to the register.
Device Test
The KAD5514P can produce preset or user defined patterns
on the digital outputs to facilitate in-situ testing. A static word
can be placed on the output bus, or two different words can
alternate. In the alternate mode, the values defined as
Word 1 and Word 2 (as shown in Table 15) are set on the
output bus on alternating clock phases. The test mode is
enabled asynchronously to the sample clock, therefore
several sample clock cycles may elapse before the data is
present on the output bus.
ADDRESS 0XC0: TEST_IO
Bits 7:6 User Test Mode
These bits set the test mode to static (0x00) or alternate
(0x01) mode. Other values are reserved.
The four LSBs in this register (Output Test Mode) determine
the test pattern in combination with registers 0xC2 through
0xC5. Refer to Table 16.
TABLE 11. CLOCK DIVIDER SELECTION
VALUE
0x72[2:0]
CLOCK DIVIDER
000
Pin Control
001
Divide by 1
010
Divide by 2
100
Divide by 4
TABLE 12. OUTPUT MODE CONTROL
VALUE
0x93[7:5]
OUTPUT MODE
000
Pin Control
001
LVDS 2mA
010
LVDS 3mA
100
LVCMOS
TABLE 13. OUTPUT FORMAT CONTROL
VALUE
0x93[2:0]
OUTPUT FORMAT
000
Pin Control
001
Two’s Complement
010
Gray Code
100
Offset Binary
TABLE 14. DLL RANGES
DLL RANGE
MIN
MAX
UNIT
Slow
40
100
MSPS
Fast
80
fS MAX
MSPS
FIGURE 42. SETTING OUTPUT_MODE_B REGISTER
READ
CONFIG_STATUS
0x75
READ
OUTPUT_MODE_B
0x74
DESIRED
VALUE
WRITE TO
0x74
KAD5514P
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相關(guān)代理商/技術(shù)參數(shù) |
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| KAD5514P-17Q48 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:14-Bit, 250/210/170/125MSPS ADC |
| KAD5514P-17Q72 | 制造商:Intersil Corporation 功能描述:14-BIT, 170MSPS SINGLE-CHANNEL ADC, PROGRAMMABLE LVDS/LVCMOS - Rail/Tube 制造商:Intersil Corporation 功能描述:IC ADC 14BIT 170MSPS SGL 72-QFN |
| KAD5514P-21Q48 | 制造商:Intersil Corporation 功能描述:14-BIT, 210MSPS SINGLE-CHANNEL ADC, PROGRAMMABLE LVDS/LVCMOS - Rail/Tube 制造商:Intersil Corporation 功能描述:IC ADC 14BIT 210MSPS SGL 48-QFN |
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| KAD5514P-25Q48 | 制造商:Intersil Corporation 功能描述:14-BIT, 250MSPS SINGLE-CHANNEL ADC, PROGRAMMABLE LVDS/LVCMOS - Rail/Tube 制造商:Intersil Corporation 功能描述:IC ADC 14BIT 250MSPS SGL 48-QFN 制造商:Intersil Corporation 功能描述:IC, ADC, 14BIT, Resolution (Bits):14bit, Sampling Rate:250MSPS, Supply Voltage T 制造商:Intersil Corporation 功能描述:IC, ADC, 14BIT, Resolution (Bits):14bit, Sampling Rate:250MSPS, Supply Voltage Type:Single, Supply Voltage Min:1.7V, Supply Voltage Max:1.9V, Supply Current:170mA, Digital IC Case Style:QFN, No. of Pins:48, Data Interface:SPI, MSL:- , RoHS Compliant: Yes |
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