- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374284 > K5A3280YTC-T755 (SAMSUNG SEMICONDUCTOR CO. LTD.) MCP MEMORY PDF資料下載
參數(shù)資料
| 型號(hào)： | K5A3280YTC-T755 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | MCP MEMORY |
| 中文描述： | MCP的記憶 |
| 文件頁數(shù)： | 20/45頁 |
| 文件大小： | 625K |
| 代理商： | K5A3280YTC-T755 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當(dāng)前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁
MCP MEMORY
K5A3x80YT(B)C
Revision 0.0
November 2002
- 20 -
Preliminary
Hardware Reset
Flash memory offers a reset feature by driving the RESET ball to V
IL
.
The RESET ball must be kept low (V
IL
) for at least 500ns.
When the RESET ball is driven low, any operation in progress will be terminated and the internal state machine will be reset to the
standby mode after 20us. If a hardware reset occurs during a program operation, the data at that particular location will be lost. Once
the RESET ball is taken high, the device requires 200ns of wake-up time until outputs are valid for read access. Also, note that all the
data output balls are tri-stated for the duration of the RESET pulse.
The RESET ball may be tied to the system reset ball. If a system reset occurs during the Internal Program and Erase Routine, the
device will be automatically reset to the read mode ; this will enable the systems microprocessor to read the boot-up firmware from
the Flash memory.
Power-up Protection
To avoid initiation of a write cycle during Vcc
F
Power-up, RESET low must be asserted during power-up. After RESET goes high, the
device is reset to the read mode.
Low Vcc
F
Write Inhibit
To avoid initiation of a write cycle during Vcc
F
power-up and power-down, a write cycle is locked out for Vcc
F
less than 1.8V. If Vcc
F
< V
LKO
(Lock-Out Voltage), the command register and all internal program/erase circuits are disabled. Under this condition the device
will reset itself to the read mode. Subsequent writes will be ignored until the Vcc
F
level is greater than V
LKO
. It is the user
′
s responsi-
bility to ensure that the control balls are logically correct to prevent unintentional writes when Vcc
F
is above 1.8V.
Write Pulse Glitch Protection
Noise pulses of less than 5ns(typical) on CE
F
, OE, or WE will not initiate a write cycle.
Logical Inhibit
Writing is inhibited under any one of the following conditions : OE = V
IL
,
CE
F
= V
IH
or WE = V
IH
.
To initiate a write, CE
F
and WE must
be "0", while OE is "1".
Commom Flash Memory Interface
Common Flash Momory Interface is contrived to increase the compatibility of host system software. It provides the specific informa-
tion of the device, such as memory size, byte/word configuration, and electrical features. Once this information has been obtained,
the system software will know which command sets to use to enable flash writes, block erases, and control the flash component.
When the system writes the CFI command(98H) to address 55H in word mode(or address AAH in byte mode), the device enters the
CFI mode. And then if the system writes the address shown in Table 12, the system can read the CFI data. Query data are always
presented on the lowest-order data outputs(DQ0-7) only. In word(x16) mode, the upper data outputs(DQ8-15) is 00h. To terminate
this operation, the system must write the reset command.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K5A3280YTC-T855 | MCP MEMORY |
| K5A3380YBC-T755 | MCP MEMORY |
| K5A3380YBC-T855 | MCP MEMORY |
| K5A3380YTC-T755 | MCP MEMORY |
| K5A3380YTC-T855 | MCP MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K5A3280YTC-T755000 | 制造商:Samsung Electro-Mechanics 功能描述:MCP 32M BIT (4M X 8/2M X 16) DUAL BANK NOR FLASH MEMORY / 8M(1M X 8/512K X 16) FULL CMOS SRAM, PBGA69 |
| K5A3280YTC-T855 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MCP MEMORY |
| K5A3340YBC-T755 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Multi-Chip Package MEMORY 32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 4M(512Kx8/256Kx16) Full CMOS SRAM |
| K5A3340YBC-T855 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Multi-Chip Package MEMORY 32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 4M(512Kx8/256Kx16) Full CMOS SRAM |
| K5A3340YT | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Multi-Chip Package MEMORY 32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 4M(512Kx8/256Kx16) Full CMOS SRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。