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參數(shù)資料
| 型號： | K4S643232C-TL60 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Dual Low-Noise Precision Rail-To-Rail Operational Amplifier 14-SOIC |
| 中文描述： | 200萬× 32內(nèi)存為512k × 32 × 4銀行同步DRAM LVTTL |
| 文件頁數(shù)： | 18/43頁 |
| 文件大?。?/td> | 1155K |
| 代理商： | K4S643232C-TL60 |
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K4S643232C
CMOS SDRAM
REV. 1.1 Nov. '99
- 18
*Note :
1. To prevent bus contention, DQM should be issued which makes at least one gap between data in and data out.
2. To inhibit invalid write, DQM should be issued.
3. This precharge command and burst write command should be of the same bank, otherwise it is not precharge
interrupt but only another bank precharge of four banks operation.
4. For -55/60/70/80/10, tRDL=1CLK product can be supported within restricted amounts and it will be distinguished by bucket code "NV"
. From the next generation, tRDL will be only 2CLK for every clock frequency.
5. Write Interrupted by Precharge & DQM
D
0
D
1
D
2
CLK
CMD
DQM
DQ
Masked by DQM
WR
PRE
D
3
Note 3,4
Note 2
6. Precharge
D
0
D
1
D
2
CLK
CMD
DQ
WR
PRE
D
3
1) Normal Write (BL=4)
tRDL
Note 1,4
2) Normal Read (BL=4)
CLK
CMD
DQ(CL2)
DQ(CL3)
RD
PRE
Q
0
Q
1
Q
2
Q
3
Q
0
Q
1
Q
2
Q
3
1
2
*Note :
1. t
RDL
: Last data in to row precharge delay
2. Number of valid output data after row precharge : 1, 2 for CAS Latency = 2, 3 respectively.
3. The row active command of the precharge bank can be issued after t
RP
from this point.
The new read/write command of other activated bank can be issued from this point.
At burst read/write with auto precharge, CAS interrupt of the same/another bank is illegal.
4. For -55/60/70/80/10, tRDL=1CLK product can be supported within restricted amounts and it will be distinguished by bucket code "NV"
. From the next generation, tRDL will be only 2CLK for every clock frequency
7. Auto Precharge
D
0
D
1
D
2
CLK
CMD
DQ
WR
D
3
1) Normal Write (BL=4)
Note 3,4
Auto Precharge Starts
2) Normal Read (BL=4)
CLK
CMD
DQ(CL2)
DQ(CL3)
RD
D
0
D
1
D
2
D
3
D
0
D
1
D
2
D
3
Note 3
Auto Precharge Starts
Note 2
相關PDF資料 |
PDF描述 |
|---|---|
| K4S643232C-TL70 | Dual Low-Noise Precision Rail-To-Rail Operational Amplifier 14-SOIC |
| K4S643232C-TL80 | Dual Low-Noise Precision Rail-To-Rail Operational Amplifier 8-PDIP |
| K4S643232C | Replaced by TLC2201A : Advanced LinCMOS(TM) Low-Noise Precision Operational Amplifier 8-PDIP 0 to 70 |
| K4S643232C-TC10 | Low Noise Precision Advanced LinCMOS(TM) Single Operational Amplifier 20-LCCC -55 to 125 |
| K4S643232C-TC55 | Low Noise Precision Advanced LinCMOS(TM) Single Operational Amplifier 8-CDIP -55 to 125 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| K4S643232C-TL70 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL |
| K4S643232C-TL80 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL |
| K4S643232E | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL |
| K4S643232E- | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL(3.3V) |
| K4S643232E-TC45 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL |
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