參數(shù)資料
型號: K4E641611D-TC50
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 4M x 16bit CMOS Dynamic RAM with Extended Data Out
中文描述: 4米× 16位的CMOS動態(tài)隨機(jī)存儲器的擴(kuò)展數(shù)據(jù)輸出
文件頁數(shù): 5/36頁
文件大?。?/td> 882K
代理商: K4E641611D-TC50
CMOS DRAM
K4E661611D,
K4E641611D
CAPACITANCE
(T
A
=25
°
C, V
CC
=5.0V, f=1MHz)
Parameter
Symbol
Min
Max
Units
Input capacitance [A0 ~ A12]
C
IN1
-
5
pF
Input capacitance [RAS, UCAS, LCAS, W, OE]
C
IN2
-
7
pF
Output capacitance [DQ0 - DQ15]
C
DQ
-
7
pF
AC CHARACTERISTICS
(0
°
C
T
A
70
°
C, See note 1,2)
Test condition : V
CC
=5.0V
±
10%, Vih/Vil=2.6/0.7V, Voh/Vol=2.0/0.8V
Parameter
Symbol
-50
-60
Units
Note
Min
Max
Min
Max
Random read or write cycle time
t
RC
84
104
ns
Read-modify-write cycle time
t
RWC
116
138
ns
Access time from RAS
t
RAC
50
60
ns
3,4,10
Access time from CAS
t
CAC
13
15
ns
3,4,5
Access time from column address
t
AA
25
30
ns
3,10
CAS to output in Low-Z
t
CLZ
t
CEZ
3
3
ns
3
Output buffer turn-off delay from CAS
3
13
3
13
ns
6,21
OE to output in Low-Z
t
OLZ
3
3
ns
3
Transition time (rise and fall)
t
T
1
50
1
50
ns
2
RAS precharge time
t
RP
30
40
ns
RAS pulse width
t
RAS
50
10K
60
10K
ns
RAS hold time
t
RSH
t
CSH
13
15
ns
CAS hold time
38
45
ns
CAS pulse width
t
CAS
8
10K
10
10K
ns
RAS to CAS delay time
t
RCD
20
37
20
45
ns
4
RAS to column address delay time
t
RAD
15
25
15
30
ns
10
CAS to RAS precharge time
t
CRP
t
ASR
5
5
ns
Row address set-up time
0
0
ns
Row address hold time
t
RAH
10
10
ns
Column address set-up time
t
ASC
0
0
ns
Column address hold time
t
CAH
8
10
ns
13
Column address to RAS lead time
t
RAL
25
30
ns
13
Read command set-up time
t
RCS
t
RCH
0
0
ns
Read command hold time referenced to CAS
0
0
ns
8
Read command hold time referenced to RAS
t
RRH
0
0
ns
8
Write command hold time
t
WCH
10
10
ns
Write command pulse width
t
WP
10
10
ns
Write command to RAS lead time
t
RWL
13
15
ns
Write command to CAS lead time
t
CWL
t
DS
8
10
ns
16
Data set-up time
0
0
ns
9,19
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