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參數(shù)資料
| 型號： | ISPPAC81 |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | In-System Programmable Analog Circuit |
| 中文描述： | 在系統(tǒng)可編程模擬電路 |
| 文件頁數(shù)： | 12/20頁 |
| 文件大?。?/td> | 176K |
| 代理商： | ISPPAC81 |
Lattice Semiconductor
ispPAC81 Data Sheet
12
Table 4. Input Common-Mode Voltage Range Limitations
Software-Based Design Environment
Design Entry Software
Designers con
fi
gure the ispPAC81 and verify its performance using PAC-Designer, an easy-to-use, Microsoft Win-
dows compatible program. Circuit designs are entered graphically and then veri
fi
ed, all within the PAC-Designer
environment. Full device programming is supported using PC parallel port I/O operations and a download cable
connected to the serial programming interface of the ispPAC81. A database of
fi
lter con
fi
gurations is included with
thousands of possible implementations to choose from. In addition, comprehensive on-line and printed documenta-
tion is provided that covers all aspects of PAC-Designer operation.
The PAC-Designer schematic window, shown in Figure 2, provides access to all con
fi
gurable ispPAC81 elements
via its graphical user interface. All analog input and output pins are represented. Static or non-con
fi
gurable pins
such as power, ground, VREF
OUT
, and the serial digital interface are omitted for clarity. Any element in the sche-
matic window can be accessed via mouse operations as well as menu commands. When completed, con
fi
gura-
tions can be saved, simulated, and downloaded to devices.
PAC-Designer operation can be automated and extended by using custom-designed Visual Basic programs that
set the interconnections and the parameters of ispPAC products. More information on this and other topics is
included in the on-line documentation as well as the
PAC-Designer Getting Started Manual.
Design Simulation Capability
A powerful feature of PAC-Designer is its simulation capability, enabling quick and accurate veri
fi
cation of circuit
operation and performance. Once a circuit is con
fi
gured via the interactive design process, gain and phase
response between any input and output can then be determined. This function is part of the simulator capability
which derives a transfer equation between the two points and then sweeps it over the user-speci
fi
ed frequency
range. Figure 3 shows a typical screen plot of the gain/phase simulator. In it are the input to output response
curves of an Elliptical and a Butterworth response stored in con
fi
guration A and B respectively. These are the two
options speci
fi
ed in the design screen window shown in Figure 2.
Input Voltage Magnitude (Volts-Peak)
V
CM+
G=1
4.000
0.557
3.900
0.728
3.800
0.899
3.700
1.071
3.600
1.242
3.500
1.413
3.400
1.584
3.300
1.756
3.200
1.927
3.100
2.098
3.000
2.270
2.900
2.441
2.800
2.612
2.700
2.783
2.600
2.955
2.574
3.000*
2.500
3.126
*Peak input voltage for guaranteed performance at a given gain setting.
V
CM-
1.000
1.100
1.200
1.300
1.400
1.500
1.600
1.700
1.800
1.900
2.000
2.100
2.200
2.300
2.400
2.426
2.500
G=2
0.278
0.364
0.450
0.535
0.621
0.707
0.792
0.878
0.964
1.049
1.135
1.220
1.306
1.392
1.477
1.500*
1.563
G=5
0.111
0.146
0.180
0.214
0.248
0.283
0.317
0.351
0.385
0.420
0.454
0.488
0.522
0.557
0.591
0.600*
0.625
G=10
0.056
0.073
0.090
0.107
0.124
0.141
0.158
0.176
0.193
0.210
0.227
0.244
0.261
0.278
0.295
0.300*
0.313
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPPAC81-01PI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC81-01SI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ispPAC-CLK5304S-01T48C | 功能描述:時鐘驅(qū)動器及分配 ISP Zero Delay Unv F an-Out Buf-Sngl End RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| ISPPACCLK5304S-01T48C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended |
| ispPAC-CLK5304S-01T48I | 功能描述:時鐘驅(qū)動器及分配 ISP 0 Delay Unv Fan- Out Buf-Sngl End I RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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