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參數(shù)資料
| 型號： | ISPPAC30 |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | In-System Programmable Analog Circuit |
| 中文描述： | 在系統(tǒng)可編程模擬電路 |
| 文件頁數(shù)： | 17/30頁 |
| 文件大小： | 379K |
| 代理商： | ISPPAC30 |
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Lattice Semiconductor
ispPAC30 Preliminary Data Sheet
17
A Ground-Based Current Sense Technique
Because the ispPAC30’s common-mode input range extends down to ground, this part is straightforward to use in
applications with ground-referenced signals. An example of such an application is the current sensor shown in Fig-
ure 4. A 0-10A current input develops a voltage ranging from 0-1V across the 0.1
sense resistor. This application
also illustrates one of the primary bene
fi
ts of differential signal processing. Although one can sense the voltage at
the resistor’s input terminal with a single-ended ampli
fi
er, this assumes that the ground terminal of the resistor is
really at ground. At ampere-level currents, this is a big, and often unwarranted assumption which can result in sig-
ni
fi
cant measurement errors. By sensing the actual voltage at both resistor terminals one can avoid this source of
measurement error.
Figure 4. ispPAC30 Sensing Differential Signals Near Ground
In this particular application, where high currents are being measured, there may be the possibility that the volt-
ages at the resistor terminals exceed those that the ispPAC30 can safely handle. If the input voltage becomes
lower than -0.6V or higher than +5.6V, input protection diodes inside the device will begin to turn on and shunt input
current to either ground or the positive power supply. In this case, since amperes of current are potentially avail-
able, signi
fi
cant damage to the ispPAC30 could result if this occurs. Resistors R2 and R3 protect against this possi-
bility, by limiting maximum input current to safe levels (milliamperes) that the device’s input protection networks can
readily handle.
Voltage Reference Output
The 2.5V voltage reference output of the ispPAC30 (VREF
OUT
) has a high impedance voltage output which should
be buffered when using it as an external reference to drive other circuitry. It also should always be decoupled using
the recommended capacitor speci
fi
ed in the pin description table of this data sheet. If it is used to reference a high
impedance source (e.g., one that does not require more than 40
μ
A), the VREF
OUT
output can be connected to it
directly. An example is shifting the DC level of a signal connected to the input pin of an ispPAC30. Also, by using a
current limiting resistor with the VREF
OUT
pin, it may also be used without buffering and still provide a DC refer-
ence. Check the ispPAC applications literature for numerous examples of these and other useful techniques for
using VREF
OUT
. Note: If the VREF
OUT
pin is overloaded or disturbed, it will adversely affect the operation of the
rest of the ispPAC30.
Output Ampli
fi
ers
The ispPAC30 has two output ampli
fi
ers, or OA’s. The single-ended outputs of these ampli
fi
ers swing from 0V to
+5V and are hard-wired internally to the output pins. In addition, the outputs are also routed and available for con-
nection as inputs to any of the input IA’s or MDAC’s. Each OA can be con
fi
gured independently to function as either
a full-bandwidth ampli
fi
er, a low-pass
fi
lter, an integrator or a comparator. All these con
fi
guration choices are
accessed by the user via the PAC-Designer design entry software. They can also be recon
fi
gured along, with any
other part of the ispPAC30, using JTAG or SPI serial interface control to directly communicate with the device.
In addition to the multiple functions possible with the OA’s, another unique feature is that any or all of the IA’s and
MDAC’s can be selectively routed to either of the OA summing nodes. This provides the maximum amount of
fl
exi-
bility to the user over how the device is ultimately con
fi
gured. IA’s can be connected in parallel to one OA or the
IA
I
IN
0.1
20W
10k
10k
100mV/A
0-10A
R
1
R
2
R
3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISPPAC30-01P | In-System Programmable Analog Circuit |
| ISPPAC30-01PI | In-System Programmable Analog Circuit |
| ISPPAC30-01S | In-System Programmable Analog Circuit |
| ISPPAC30-01SI | In-System Programmable Analog Circuit |
| ISPPAC80-01PI | In-System Programmable Analog Circuit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPPAC30-01P | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit |
| ISPPAC30-01PI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC30-01S | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit |
| ISPPAC30-01SI | 功能描述:SPLD - 簡單可編程邏輯器件 Not Upgrade Device CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC80-01PI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
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