參數資料
型號： ISPPAC-POWR1014A-01TN48I
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： 電源管理
英文描述： In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
中文描述： 10-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP48
封裝： LEAD FREE, TQFP-48
文件頁數： 30/45頁
文件大?。?/td> 999K
代理商： ISPPAC-POWR1014A-01TN48I
Lattice Semiconductor
ispPAC-POWR1014/A Data Sheet
30
SMBus SMBAlert Function
The ispPAC-POWR1014A provides an SMBus SMBAlert function so that it can request service from the bus mas-
ter when it is used as part of an SMBus system. This feature is supported as an alternate function of OUT3. When
the SMBAlert feature is enabled, OUT3 is controlled by a combination of the PLD output and the GP3_E
N
b bit
(Figure 23).
N
ote: To enable the SMBAlert feature, the SMB_Mode (EECMOS bit) should be set in software.
Figure 23. ispPAC-POWR1014/A SMBAlert Logic
The typical flow for an SMBAlert transaction is as follows (Figure 23):
1. GP3_E
N
b bit is forced (Via I
2
C write) to Low
2. ispPAC-POWR1014A PLD Logic pulls OUT3/SMBA Low
3. Master responds to interrupt from SMBA line
4. Master broadcasts a read operation using the SMBus Alert Response Address (ARA)
5. ispPAC-POWR1014A responds to read request by transmitting its device address
6. If transmitted device address matches ispPAC-POWR1014A address, it sets GP3_E
N
b bit high.
This releases OUT3/SMBA.
Figure 24. SMBAlert Bus Transaction
After OUT3/SMBA has been released, the bus master (typically a microcontroller) may opt to perform some service
functions in which it may send data to or read data from the ispPAC-POWR1014A. As part of the service functions,
the bus master will typically need to clear whatever condition initiated the SMBAlert request, and will also need to
reset GP3_E
N
b to re-enable the SMBAlert function. For further information on the SMBus, the user should consult
the SMBus Standard.
PLD
Output
Routin
g
Pool
MUX
MUX
GP3_ENb
SMBAlert
Lo
g
ic
OUT3/SMBA
I2C Interface Unit
PLD O
u
tp
u
t/GP_O
u
tp
u
t Register Select
(E2 Config
u
ration)
OUT3/SMBA Mode Select
(E2 Config
u
ration)
ACK
A4
A3
A2
A1
A0
x
A5
A6
START
1
2
3
4
5
6
7
8
9
0
0
0
1
1
0
0
ACK
1
2
3
4
5
6
7
8
9
ALERT RESPONSE ADDRESS
(0001 100)
SLAVE ADDRESS (7 BITS)
SCL
SDA
R/W
STOP
SMBA
Note: Shaded Bits Asserted by Slave
SLAVE
ASSERTS
SMBA
SLAVE
RELEASES
SMBA
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相關代理商/技術參數
參數描述
ISPPACPOWR1014A01TN48IAG6 制造商:Lattice Semiconductor Corporation 功能描述:
ispPAC-POWR1014A-02T48I 功能描述:監(jiān)控電路 ispPAC-POWR1014 w/ ADC INDLOG DEV(ECP3) RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數: 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
ispPAC-POWR1014A-02TN48I 功能描述:監(jiān)控電路 ispPAC-POWR1014 w/ ADC, IND, Pb-Free RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數: 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
ISPPACPOWR120801T44E 制造商:Lattice Semiconductor Corporation 功能描述:
ISPPAC-POWR1208-01T44E 功能描述:監(jiān)控電路 PROGRAMMABLE PWR SUPPLY CONTR RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數: 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
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