參數(shù)資料
型號: ISPPAC-POWR1014
廠商: Lattice Semiconductor Corporation
英文描述: In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
中文描述: 在系統(tǒng)可編程電源監(jiān)控器,復位發(fā)生器和排序控制器
文件頁數(shù): 33/45頁
文件大小: 999K
代理商: ISPPAC-POWR1014
Lattice Semiconductor
ispPAC-POWR1014/A Data Sheet
33
Figure 27. ispPAC-POWR1014/A TDI/ATDI Pin Selection Diagram
Table 10 shows in truth table form the same conditions required to select either TDI or ATDI as in the logic diagram
found in Figure 27.
Table 10. ispPAC-POWR1014/A ATDI/TDI Selection Table
Please refer to the Lattice application note A
N
6068,
Programming the ispPAC-POWR1220AT8 in a JTAG Chain
Using ATDI
. The application note includes specific SVF code examples and information on the use of Lattice
design tools to verify device operation in alternate TDI mode.
VCCPROG Power Supply Pin
Because the VCCPROG pin directly powers the on-chip programming circuitry, the ispPAC-POWR1014/A device
can be programmed by applying power to the VCCPROG pin (without powering the entire chip though the VCCD
and VCCA pins). In addition, to enable the on-chip JTAG interface circuitry, power should be applied to the VCCJ
pin.
When the ispPAC-POWR1014/A is using the VCCPROG pin, its VCCD and VCCA pins can be open or pulled low.
Additionally, other than JTAG I/O pins, all digital output pins are in Hi-Z state, HVOUT pins configured as MOSFET
driver are driven low, and all other inputs are ignored.
To switch the power supply back to VCCD and VCCA pins, one should turn the VCCPROG supply and VCCJ off
before turning the regular supplies on.
User Electronic Signature
A user electronic signature (UES) feature is included in the E
2
CMOS memory of the ispPAC-POWR1014/A. This
consists of 32 bits that can be configured by the user to store unique data such as ID codes, revision numbers or
TDISEL Pin
H
H
L
JTAG State Machine
Test-Logic-Reset
N
o
Yes
X
4 Consecutive
IDCODE Commands
Loaded at Update-IR
Yes
N
o
X
Active JTAG
Data Input Pin
ATDI (TDI Disabled)
TDI (ATDI Disabled)
ATDI (TDI Disabled)
1
0
TDI
ATDI
TDISEL
Q
CLR
SET
Test-Logic-Reset
4 Consec
u
ti
v
e
IDCODE Instr
u
ctions
Loaded at Update-IR
TDO
TMS
TCK
JTAG
ispPAC-POWR1014/A
相關PDF資料
PDF描述
ISPPAC-POWR1014-01T48I In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
ISPPAC-POWR1014-01TN48I In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
ISPPAC-POWR1014A In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
ISPPAC-POWR1014A-01T48I In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
ISPPAC-POWR1014A-01TN48I In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
相關代理商/技術參數(shù)
參數(shù)描述
ISPPAC-POWR1014_08 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
ispPAC-POWR1014-01T48I 功能描述:監(jiān)控電路 Prec. Prog. Pwr Sppl y Seq. Mon. Trim I RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
ISPPAC-POWR1014-01TN148I 制造商:Lattice Semiconductor Corporation 功能描述:#WR MGR ISP RESET & SEQ CNTRL 48TQFP
ispPAC-POWR1014-01TN48I 功能描述:監(jiān)控電路 Prec. Prog. Pwr Sppl y Seq. Mon. Trim I RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
ispPAC-POWR1014-02T48I 功能描述:監(jiān)控電路 Prec Progm Pwr Sply Seq Mon Trim, IND RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel