參數(shù)資料
型號(hào): ISPPAC-CLK5620V-01TN48I
廠商: Lattice Semiconductor Corporation
英文描述: Backlight LED; Color:Red; Digit/Alpha Height:85mm; Forward Current:500mA; Operating Temperature Range:0 C to +50 C; Leaded Process Compatible:No; Light Emitting Area:85x220mm; Peak Reflow Compatible (260 C):No
中文描述: 在系統(tǒng)可編程,零延遲時(shí)鐘發(fā)生器通用扇出緩沖器
文件頁數(shù): 8/47頁
文件大?。?/td> 871K
代理商: ISPPAC-CLK5620V-01TN48I
Lattice Semiconductor
ispClock5600 Family Data Sheet
8
Output Test Loads
Figures 3-5 show the equivalent termination loads used to measure rise/fall times, output timing adders and other
selected parameters as noted in the various tables of this data sheet.
Figure 3. CMOS Termination Load
Figure 4. HSTL/SSTL Termination Load
Figure 5. LVDS/LVPECL Termination Load
ispCLOCK
SCOPE
950
50
/3"
50
/36"
50
5pF
Zo = 50
ispCLOCK
SCOPE
50
/3"
50
/36"
950
50
5pF
Zo = HSTL: ~20
SSTL: 40
VTERM
50
ispCLOCK
50
/36"
34
34
50
/36"
0.1U
0.1U
44.2
3pF
(parasitic)
3pF
(parasitic)
SCOPE
50
50
5pF
5pF
ChA
ChB
50
/3"
50
/1"
50
/3"
50
/1"
Interface Circuit
33.2
33.2
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISPPAC-POWR1014 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
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ispPAC-POWR1014-01T48I 功能描述:監(jiān)控電路 Prec. Prog. Pwr Sppl y Seq. Mon. Trim I RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
ISPPAC-POWR1014-01TN148I 制造商:Lattice Semiconductor Corporation 功能描述:#WR MGR ISP RESET & SEQ CNTRL 48TQFP
ispPAC-POWR1014-01TN48I 功能描述:監(jiān)控電路 Prec. Prog. Pwr Sppl y Seq. Mon. Trim I RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲(典型值):10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel