參數(shù)資料
型號： ISPPAC-CLK5620V-01TN48I
廠商： Lattice Semiconductor Corporation
英文描述： Backlight LED; Color:Red; Digit/Alpha Height:85mm; Forward Current:500mA; Operating Temperature Range:0 C to +50 C; Leaded Process Compatible:No; Light Emitting Area:85x220mm; Peak Reflow Compatible (260 C):No
中文描述： 在系統(tǒng)可編程，零延遲時鐘發(fā)生器通用扇出緩沖器
文件頁數(shù)： 40/47頁
文件大?。?/td> 871K
代理商： ISPPAC-CLK5620V-01TN48I
Lattice Semiconductor
ispClock5600 Family Data Sheet
40
VCCD
Digital Core VCC
Power
24, 33
47, 71
GNDD
Digital GND
GND
23, 48
46, 93
VCCJ
JTAG interface VCC
Power
36
74
REFA+
Clock Reference A positive input
Input
18
38
REFA-
Clock Reference A negative input
Input
19
39
REFB+
Clock Reference B positive input
Input
—
42
REFB-
Clock Reference B negative input
Input
Input
1
—
41
REFSEL
Clock Reference Select input (LVCMOS)
—
43
REFVTT
Termination voltage for reference inputs
Power
20
40
FBKA+
Clock feedback A positive input
Input
15
32
FBKA-
Clock feedback A negative input
Input
16
33
FBKB+
Clock feedback B positive input
Input
—
36
FBKB-
Clock feedback B negative input
Input
—
35
FBKSEL
Clock feedback select input (LVCMOS)
Input1
—
37
FBKVTT
Termination voltage for feedback inputs
Power
17
34
TDO
JTAG TDO Output line
Output
Input
2
35
73
TDI
JTAG TDI Input line
39
84
TCK
JTAG Clock Input
Input
Input
2
38
83
TMS
JTAG Mode Select
37
82
LOCK
PLL Lock indicator, LOW indicates PLL lock
Output
Input
1
Input
1
34
72
SGATE
Synchronous output gate
40
85
GOE
Global Output Enable
42
87
OEX
Output Enable 1
Input
21
44
OEY
Output Enable 2
Input
Input
1
Input
1
Input
1
Input
1
22
45
PS0
Pro
fi
le Select 0
44
89
PS1
Pro
fi
le Select 1
43
88
PLL_BYPASS PLL Bypass
47
92
RESET
Reset PLL
41
86
TEST1
Test Input 1 - connect to GNDD
Input
46
91
TEST2
Test Input 2 - connect to GNDD
Input
45
90
n/c
No internal connection
n/a
—
1, 2, 23, 24, 25, 26, 27,
28, 29, 48, 49, 50, 75,
76, 77, 78, 79, 94, 97,
98, 99, 100
Reserved
Factory use only - Do not connect
n/a
—
80, 81, 95, 96
1. Internal pull-down resistor.
2. Internal pull-up resistor.
Pin Descriptions (Continued)
Pin Name
Description
Pin Type
Pin Number
ispClock5610
48 TQFP
ispClock5620
100 TQFP
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ISPPAC-POWR1014 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
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ispPAC-POWR1014-01T48I 功能描述:監(jiān)控電路 Prec. Prog. Pwr Sppl y Seq. Mon. Trim I RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
ISPPAC-POWR1014-01TN148I 制造商:Lattice Semiconductor Corporation 功能描述:#WR MGR ISP RESET & SEQ CNTRL 48TQFP
ispPAC-POWR1014-01TN48I 功能描述:監(jiān)控電路 Prec. Prog. Pwr Sppl y Seq. Mon. Trim I RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
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