參數(shù)資料
型號(hào)： ISPPAC-CLK5620V-01TN48I
廠商： Lattice Semiconductor Corporation
英文描述： Backlight LED; Color:Red; Digit/Alpha Height:85mm; Forward Current:500mA; Operating Temperature Range:0 C to +50 C; Leaded Process Compatible:No; Light Emitting Area:85x220mm; Peak Reflow Compatible (260 C):No
中文描述： 在系統(tǒng)可編程，零延遲時(shí)鐘發(fā)生器通用扇出緩沖器
文件頁(yè)數(shù)： 7/47頁(yè)
文件大?。?/td> 871K
代理商： ISPPAC-CLK5620V-01TN48I
Lattice Semiconductor
ispClock5600 Family Data Sheet
7
Switching Characteristics – Timing Adders for I/O Modes
Output Rise and Fall Times – Typical Values
1, 2
Adder Type
t
IOI
Input Adders
2
LVTTL_in
Description
Min.
Typ.
Max.
Units
Using LVTTL Standard
0
0
0
ns
LVCMOS18_in
Using LVCMOS 1.8V Standard
0.20
0.45
0.70
ns
LVCMOS25_in
Using LVCMOS 2.5V Standard
0
0
0
ns
LVCMOS33_in
Using LVCMOS 3.3V Standard
0
0
0
ns
SSTL2_in
Using SSTL2 Standard
1.15
1.35
1.60
ns
SSTL3_in
Using SSTL3 Standard
1.15
1.35
1.60
ns
HSTL_in
Using HSTL Standard
1.15
1.35
1.60
ns
LVDS_in
Using LVDS Standard
1.15
1.35
1.60
ns
LVPECL_in
t
IOO
Output Adders
1, 3
LVTTL_out
Using LVPECL Standard
1.15
1.35
1.60
ns
Output Con
fi
gured as LVTTL Buffer
-0.10
0.15
0.45
ns
LVCMOS18_out
Output Con
fi
gured as LVCMOS 1.8V Buffer
-0.15
0.15
0.55
ns
LVCMOS25_out
Output Con
fi
gured as LVCMOS 2.5V Buffer
-0.10
0.15
0.45
ns
LVCMOS33_out
Output Con
fi
gured as LVCMOS 3.3V Buffer
-0.10
0.15
0.45
ns
SSTL2_out
Output Con
fi
gured as SSTL2 Buffer
-0.10
0.15
0.45
ns
SSTL3_out
Output Con
fi
gured as SSTL3 Buffer
-0.10
0.15
0.45
ns
HSTL_out
Output Con
fi
gured as HSTL Buffer
0
0.15
0.45
ns
LVDS_out
Output Con
fi
gured as LVDS Buffer
0
0
0
ns
LVPECL_out
t
IOS
Output Slew Rate Adders
1
Slew_1
Output Con
fi
gured as LVPECL Buffer
0
0
0
ns
Output Slew_1 (Fastest)
—
0
—
ps
Slew_2
Output Slew_2
—
330
—
ps
Slew_3
Output Slew_3
—
660
—
ps
Slew_4
Output Slew_4 (Slowest)
—
1320
—
ps
1. Measured under standard output load conditions – see Figures 3-5.
2. All input adders referenced to LVTTL.
3. All output adders referenced to LVPECL.
Output Type
Slew 1 (Fastest)
Slew 2
Slew 3
Slew 4 (Slowest)
Units
t
R
t
F
t
R
t
F
t
R
t
F
t
R
t
F
LVTTL
0.65
0.45
0.85
0.60
1.20
0.90
1.75
1.30
ns
LVCMOS 1.8V
0.90
0.40
1.05
0.50
1.40
0.80
2.00
1.20
ns
LVCMOS 2.5V
0.70
0.40
0.90
0.55
1.20
0.85
1.80
1.20
ns
LVCMOS 3.3V
0.65
0.45
0.85
0.60
1.20
0.90
1.75
1.30
ns
SSTL2
0.65
0.40
0.90
0.60
1.35
0.85
2.30
1.40
ns
SSTL3
0.65
0.40
0.90
0.60
1.35
0.85
2.30
1.40
ns
HSTL
LVDS
3
LVPECL
3
0.85
0.30
1.00
0.50
1.50
0.70
2.55
1.10
ns
0.25
0.20
—
—
—
—
—
—
ns
0.20
0.20
—
—
—
—
—
—
ns
1. See Figures 3-5 for test conditions.
2. Measured between 20% and 80% points.
3. Only the ‘fastest’ slew rate is available in LVDS and LVPECL modes.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISPPAC-POWR1014 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
ISPPAC-POWR1014_08 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
ispPAC-POWR1014-01T48I 功能描述:監(jiān)控電路 Prec. Prog. Pwr Sppl y Seq. Mon. Trim I RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
ISPPAC-POWR1014-01TN148I 制造商:Lattice Semiconductor Corporation 功能描述:#WR MGR ISP RESET & SEQ CNTRL 48TQFP
ispPAC-POWR1014-01TN48I 功能描述:監(jiān)控電路 Prec. Prog. Pwr Sppl y Seq. Mon. Trim I RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
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