參數(shù)資料
型號(hào): ISL6721
廠商: Intersil Corporation
英文描述: Flexible Single Ended Current Mode PWM Controller(靈活的單端電流模式PWM控制器)
中文描述: 靈活的單端電流模式PWM控制器(靈活的單端電流模式的PWM控制器)
文件頁(yè)數(shù): 17/21頁(yè)
文件大?。?/td> 416K
代理商: ISL6721
17
FN9110.5
July 20, 2007
case small signal operating point for the converter is at
minimum V
IN
, maximum load, maximum C
OUT
, and
minimum ESR.
The higher the desired bandwidth of the converter, the more
difficult it is to create a solution that is stable over the entire
operating range. A good rule of thumb is to limit the
bandwidth to about f
sw
/4. For this example, the bandwidth
will be further limited due to the low GBWP of the LM431-
based Error Amplifier and the opto-coupler. A bandwidth of
approximately 5kHz was selected.
For the EA compensation, the first pole is placed at the
origin by default (C
14
is an integrating capacitor). The first
zero is placed below the crossover frequency, f
co
, usually
around 1/3 f
co
. The second pole is placed at the lower of the
ESR zero or at one half of the switching frequency. The
midband gain is then adjusted to obtain the desired
crossover frequency. If the phase margin is not adequate,
the crossover frequency may have to be reduced.
Using this technique to determine the compensation, the
following values for the EA components were selected.
R
17
= R
18
= R
15
= 1k
Ω
R
20
= open
C
13
= 100nF
C
14
= 100pF
A Bode plot of the closed loop system at low line, max load
appears below.
Regulation Performance
Waveforms
Typical waveforms can be found in Figures 10 through 12.
Figure 10 shows the steady state operation of the sawtooth
oscillator waveform at RTCT (Trace 2), the SYNC output
pulse (Trace 1), and the GATE output to the converter FET
(Trace 3). Figure 11 shows the converter behavior while
operating in an overcurrent fault condition. Trace 1 is the
soft-start voltage, which increases from 0V to 4.5V, at which
point the OC fault function is enabled. The OC condition is
detected and the soft-start capacitor is discharged to the
FIGURE 9A. GAIN
10k
100k
1M
10M
100M
50
40
30
20
10
0
-10
-20
-30
-40
-50
FREQUENCY (Hz)
G
FIGURE 9B. PHASE MARGIN
10k
100k
1M
10M
100M
-100
-50
0
50
100
150
200
FREQUENCY (Hz)
P
TABLE 1. OUTPUT LOAD REGULATION, V
IN
= 48V
I
OUT
(A), 3.3V
0
I
OUT
(A), 1.8V
0.030
V
OUT
(V), 3.3V V
OUT
(V), 1.8V
3.351
1.825
0.39
0.030
3.281
1.956
0.88
0.030
3.251
1.988
1.38
0.030
3.223
2.014
1.87
0.030
3.204
2.029
2.39
0.030
3.185
2.057
2.89
0030
3.168
2.084
3.37
0.030
3.153
2.103
0
0.52
3.471
1.497
0.39
0.52
3.283
1.800
0.88
0.52
3.254
1.836
1.38
0.52
3.233
1.848
1.87
0.52
3.218
1.855
2.39
0.52
3.203
1.859
2.89
0.52
3.191
1.862
0
1.05
3.619
1.347
0.39
1.05
3.290
1.730
0.88
1.05
3.254
1.785
1.38
1.05
3.235
1.805
1.87
1.05
3.220
1.814
2.39
1.05
3.207
1.820
0
1.55
3.699
1.265
0.39
1.55
3.306
1.682
0.88
1.55
3.260
1.750
1.38
1.55
3.239
1.776
1.87
1.55
3.224
1.789
0
2.07
3.762
1.201
0.39
2.07
3.329
1.645
0.88
2.07
3.270
1.722
1.38
2.07
3.245
1.752
0
2.62
3.819
1.142
0.39
2.62
3.355
1.612
0.88
2.62
3.282
1.697
0
3.14
3.869
1.091
0.39
3.14
3.383
1.581
ISL6721
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PDF描述
ISL6722A 1024 x 9 x 2 Asynchronous Bidirectional FIFO Memory 44-PLCC 0 to 70
ISL6723AABZ Flexible Single Ended Current Mode PWM Controllers
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ISL6722AAVZ Flexible Single Ended Current Mode PWM Controllers
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