Note (1): Where two descriptions are given, depends on LX4/CX4 select LX4_MODE pin. First value is LX4 value Note (2): These mirrored bits will" />
參數(shù)資料
型號(hào)： ISL35822LPIK
廠商： Intersil
文件頁數(shù)： 21/75頁
文件大?。?/td> 0K
描述： IC CLOCK/DATA RECOVERY 192EBGA-B
標(biāo)準(zhǔn)包裝： 90
類型： 時(shí)鐘和數(shù)據(jù)恢復(fù)（CDR），多路復(fù)用器
PLL： 無
輸入： CML
輸出： CML，CMOS
電路數(shù)： 1
比率 - 輸入:輸出： 8:8
差分 - 輸入:輸出： 是/是
頻率 - 最大： 1.59Gbps
電源電壓： 1.3 V ~ 1.41 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 192-EBGA
供應(yīng)商設(shè)備封裝： 192-EBGA-B（17x17）
包裝： 托盤
28
Note (1): Where two descriptions are given, depends on LX4/CX4 select LX4_MODE pin. First value is LX4 value
Note (2): These mirrored bits will be cleared on a read of either this register or of their respective mirroring registers.
Note (3): This bit is derived from the OR of the LOS bits (1.C00A.3:0). In the case of a signal which is close to the LOS threshold value, so that LOS is changing over
time for one or more lanes, this bit may give a “FAIL” indication even though the SIGNAL_DETECT function declares the signal “GOOD”, and Byte Synch and
Lane Align all indicate a “GOOD” signal.
Note (1): Where two descriptions are given, depends on LX4/CX4 select LX4_MODE pin. First value is LX4 value
Note (2): These mirrored bits will be cleared on read of either this register or their respective registers.
Table 27. XENPAK LASI RX_ALARM STATUS REGISTER
MDIO REGISTER, ADDRESS = 1.36867 (1.9003’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION(1)
1.36867.15:6
Reserved
000’h
1.36867.6
PCS Byte Synch
1 = Alarm Condition is
Detected
0 = No Alarm Condition
is Detected
0’b
RO/LH
PCS Byte Sync Fail (logical NAND of bits 3.24.[3:0])
1.36867.5
RX Receive
Power/Level
0’b
RO/LH
LX4: Receive Laser Power from OPRXOP pin (for
polarity see 1.49181)
CX4: Loss of Signal Detect(3)
1.36867.4
PMA LF
0’b
RO/LH
PMA/PMD RX Local Fault: mirror to bit 1.8.10(2)
1.36867.3
PCS LF
0’b
RO/LH
PCS RX Local Fault: mirror to bit 3.8.10(2)
1.36867.2
PCS Code
0’b
RO/LH
PCS 8b/10b Code Violation in any lane of PCS
1.36867.1
DOM RXFlg/
RX EFIFO
0’b
RO/LH
LX4: DOM RX_Flag (from polling)
CX4: RX EFIFO over/underflow Fault
1.36867.0
PHY RX LF
0’b
RO/LH
PHY RX Local Fault Status: mirror to bit 4.8.10(2)
Table 28. XENPAK LASI TX_ALARM STATUS REGISTER
MDIO REGISTER, ADDRESS = 1.36868 (1.9004’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION(1)
1.36868.15:11
Reserved
000’h
1.36868.10
PHY S_D
1 = Alarm Condition is
Detected
0 = No Alarm
Condition is Detected
0’b
RO/ LH
LX4: No fail detected
CX4: PHY XS Signal Detect Fail (XAUI)
1.36868.9
LBC
0’b
RO LH
LX4: Laser Bias Current Fault (from OPTXLBC pin, for
polarity see 1.49181)
CX4: No failure detectable
1.36868.8
LTEMP
0’b
RO LH
LX4: Laser Temperature Fault (from OPTTEMP pin, for
polarity see 1.49181)
CX4: No failure detectable
1.36868.7
LOP
0’b
RO LH
LX4: Laser Output Power Fault (from OPTXLOP pin, for
polarity see 1.49181)
CX4: No failure detectable
1.36868.6
TX LF
0’b
RO LH
Transmit Local Fault (from TX_FAULT pin, for polarity
see 1.49170)
1.36868.5
Byte Sync
0’b
RO LH
LX4: No fail detected
CX4: PHY XS Byte Sync Fail Status
1.36868.4
PMA LF
0’b
RO LH
PMA TX Local Fault Status: mirror to bit 1.8.11(2)
1.36868.3
PCS LF
0’b
RO LH
LX4: PCS TX Local Fault Status: mirror to bit 3.8.11(2)
CX4: No failure detectable
1.36868.2
TX EFIFO
0’b
RO LH
LX4: No fail detected
CX4: Transmit EFIFO Error Status
1.36868.1
DOM TX/
PHY Code
0’b
RO LH
LX4: DOM TX_Flag (from polling)
CX4: PHY XS 8b/10b Code Violation
1.36868.0
PHY TX LF
0’b
RO LH
PHY TX Local Fault Status: mirror to bit 4.8.11(2)
ISL35822
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