參數(shù)資料
型號(hào): ISL1219
廠商: Intersil Corporation
英文描述: Low Power RTC with Battery Backed SRAM and Event Detection(具有電池供電的SRAM和事件檢測(cè)功能的低功率RTC)
中文描述: 低功耗RTC與電池供電的SRAM和事件檢測(cè)(具有電池供電的SRAM的和事件檢測(cè)功能的低功率實(shí)時(shí)時(shí)鐘)
文件頁(yè)數(shù): 22/25頁(yè)
文件大?。?/td> 373K
代理商: ISL1219
22
FN6314.1
August 14, 2006
Temperature Compensation
The ATR and DTR controls can be combined to provide
crystal drift temperature compensation. The typical
32.768kHz crystal has a drift characteristic that is similar to
that shown in Figure 20. There is a turnover temperature
(T
0
) where the drift is very near zero. The shape is parabolic
as it varies with the square of the difference between the
actual temperature and the turnover temperature.
If full industrial temperature compensation is desired in an
ISL1219 circuit, then both the DTR and ATR registers will
need to be utilized (total correction range = -94 to +140ppm).
A system to implement temperature compensation would
consist of the ISL1219, a temperature sensor, and a
microcontroller. These devices may already be in the system
so the function will just be a matter of implementing software
and performing some calculations. Fairly accurate
temperature compensation can be implemented just by using
the crystal manufacturer’s specifications for the turnover
temperature T
0
and the drift coefficient (
β
). The formula for
calculating the oscillator adjustment necessary is:
Adjustment (ppm) = (T – T
0
)
2
*
β
Once the temperature curve for a crystal is established, then
the designer should decide at what discrete temperatures
the compensation will change. Since drift is higher at
extreme temperatures, the compensation may not be
needed until the temperature is greater than 20°C from T
0
.
A sample curve of the ATR setting vs. Frequency Adjustment
for the ISL1219 and a typical RTC crystal is given in
Figure 21. This curve may vary with different crystals, so it is
good practice to evaluate a given crystal in an ISL1219
circuit before establishing the adjustment values.
This curve is then used to figure what ATR and DTR settings
are used for compensation. The results would be placed in a
lookup table for the microcontroller to access.
Layout Considerations
The crystal input at X1 has a very high impedance, and
oscillator circuits operating at low frequencies such as
32.768kHz are known to pick up noise very easily if layout
precautions are not followed. Most instances of erratic
clocking or large accuracy errors can be traced to the
susceptibility of the oscillator circuit to interference from
adjacent high speed clock or data lines. Careful layout of the
RTC circuit will avoid noise pickup and insure accurate
clocking.
Figure 22 shows a suggested layout for the ISL1219 device
using a surface mount crystal. Two main precautions should
be followed:
Do not run the serial bus lines or any high speed logic lines
in the vicinity of the crystal. These logic level lines can
induce noise in the oscillator circuit to cause misclocking.
Add a ground trace around the crystal with one end
terminated at the chip ground. This will provide termination
for emitted noise in the vicinity of the RTC device.
TEMPERATURE (°C)
-160.0
-140.0
-120.0
-100.0
-80.0
-60.0
-40.0
-20.0
0.0
-40 -30 -20 -10 0
10 20 30 40 50 60 70 80
P
FIGURE 20. RTC CRYSTAL TEMPERATURE DRIFT
-40.0
-30.0
-20.0
-10.0
0.0
10.0
20.0
30.0
40.0
50.0
60.0
70.0
80.0
90.0
0
5
10 15 20 25 30 35 40 45 50 55 60
ATR SETTING
P
FIGURE 21. ATR SETTING vs OSCILLATOR FREQUENCY
ADJUSTMENT
FIGURE 22. SUGGESTED LAYOUT FOR ISL1219 AND
CRYSTAL
ISL1219
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