- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384519 > ISD5008 (WINBOND ELECTRONICS CORP) Single-Chip Voice Record/Playback Device（Single-chip Durations of 4 to 8 minutes)(單片的錄音/錄音重放器(單片信息存儲(chǔ)持續(xù)時(shí)間4到8分鐘）) PDF資料下載
參數(shù)資料
| 型號(hào)： | ISD5008 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | Single-Chip Voice Record/Playback Device（Single-chip Durations of 4 to 8 minutes)(單片的錄音/錄音重放器(單片信息存儲(chǔ)持續(xù)時(shí)間4到8分鐘）) |
| 中文描述： | 單芯片語音記錄/播放設(shè)備（單4至8分鐘芯片工期）（單片的錄音/錄音重放器（單片信息存儲(chǔ)持續(xù)時(shí)間4到8分鐘）） |
| 文件頁數(shù)： | 5/46頁 |
| 文件大小： | 1115K |
| 代理商： | ISD5008 |
第1頁第2頁第3頁第4頁當(dāng)前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
ISD5008 Product
2
Voice Solutions in Silicon
2
PIN DESCRIPTIONS
2.1
DIGITAL I/O PINS
SCLK
The SCLK is the clock input to the ISD5008. Gener-
ated by the master microcontroller, the SCLK syn-
chronizes data transfers in and out of the device
through the MISO and MOSI lines. Data is latched
into the ISD5008 on the rising edge of SCLK and
shifted out on the falling edge.
(Serial Clock)
SS
This input, when LOW, will select the ISD5008 de-
vice.
(Slave Select)
MOSI
MOSI is the serial data input to the ISD5008 device.
The master microcontroller places data to be
clocked into the ISD5008 device on the MOSI line
one-half cycle before the rising edge of SCLK.
Data is clocked into the device LSB (Least Signifi-
cant Bit) first.
(Master Out Slave In)
MISO
MISO is the serial data output of the ISD5008 de-
vice. Data is clocked out on the falling edge of
SCLK. This output goes into a high-impedance
state when the device is not selected. Data is
clocked out of the device LSB first.
(Master In Slave Out)
INT
INT is an open drain output pin. The ISD5008 inter-
rupt pin goes LOW and stays LOW when an Over-
flow (OVF) or End of Message (EOM) marker is
detected. Each operation that ends in an EOM or
OVF generates an interrupt, including the mes-
sage cueing cycles. The interrupt is cleared the
next time an SPI cycle is completed. The interrupt
status can be read by a RINT instruction that will
give one of the two flags out the MISO line.
(Interrupt)
OVF Flag
of the ISD5008’s analog memory has been
reached during a record or playback operation.
. The overflow flag indicates that the end
EOM Flag.
ing playback, when an EOM is found. There are
eight possible EOM markers per row.
The end of message flag is set only dur-
RAC
RAC is an open drain output pin that marks the
end of a row. At the 8 kHz sample frequency, the
duration of this period is 200 ms. There are 1,200
rows of memory in the ISD5008 devices. RAC stays
HIGH for 175 ms and stays LOW for the remaining
25 ms before it reaches the end of the row.
(Row Address Clock)
The RAC pin remains HIGH for 109.38 μsec and
stays LOW for 15.63 μsec under the Message Cue-
ing mode. See Table 15 Timing Parameters for RAC
timing information at other sample rates. When a
record command is first initiated, the RAC pin re-
mains HIGH for an extra T
sample and hold circuits internal to the device.
The RAC pin can be used for message manage-
ment techniques.
RACLO
period, to load
XCLK
The external clock input for the ISD5008 product
has an internal pull-down device. Normally, the
ISD5008 is operated at one of four internal rates se-
lected for its internal oscillator by the Sample Rate
Select bits. If greater precision is required, the de-
vice can be clocked through the XCLK pin as de-
scribed in Table 2.
(External Clock Input)
Because the antialiasing and smoothing filters
track the Sample Rate Select bits, one must, for
optimum performance, change the external
clock
AND
the Sample Rate Configuration bits to
one of the four values to properly set the filters to
the correct cutoff frequency as described in Table
3. The duty cycle on the input clock is not critical,
as the clock is immediately divided by two inter-
nally. If the XCLK is not used, this input should be
connected to V
SSD
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISD5100 | SINGLE-CHIP 1 TO 16 MINUTES DURATION VOICE RECORD/PLAYBACK DEVICES WITH DIGITAL STORAGE CAPABILITY |
| ISD5116 | Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability |
| ISD5116E | Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability |
| ISD5116ED | Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability |
| ISD5116EI | Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISD5008E | 功能描述:IC VOICE REC/PLAY 4-8MIN 28-TSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時(shí)間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000 |
| ISD5008ED | 功能描述:IC VOICE REC/PL 4-8MIN EX 28TSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時(shí)間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000 |
| ISD5008EDR | 功能描述:IC VOICE REC/PL 4-8MIN EX 28TSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時(shí)間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000 |
| ISD5008EI | 功能描述:IC VOICE REC/PL 4-8MIN IN 28TSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時(shí)間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000 |
| ISD5008EIR | 功能描述:IC VOICE REC/PL 4-8MIN IN 28TSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時(shí)間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。