參數(shù)資料
型號： ISD5008
廠商： WINBOND ELECTRONICS CORP
英文描述： Single-Chip Voice Record/Playback Device（Single-chip Durations of 4 to 8 minutes)(單片的錄音/錄音重放器(單片信息存儲持續(xù)時間4到8分鐘）)
中文描述： 單芯片語音記錄/播放設(shè)備（單4至8分鐘芯片工期）（單片的錄音/錄音重放器（單片信息存儲持續(xù)時間4到8分鐘））
文件頁數(shù)： 27/46頁
文件大?。?/td> 1115K
代理商： ISD5008
ISD5008 Product
24
Voice Solutions in Silicon
path to be used is microphone input to AGC am-
plifier, then through the INPUT SOURCE MUX to the
SUM1 SUMMING amplifier. From there the path
goes through the FILTER MUX, the LOW PASS FILTER,
the SUM2 SUMMING amplifier, then to the MULTI-
LEVEL STORAGE ARRAY. In this instance, we will se-
lect the 5.3 kHz sample rate. The rest of the chip
may be powered down.
1.
Power up the AGC amplifier
—Bit AGPD
controls the power up state of the AGC
amplifier. This is bit D0 of CFG1 and must be
set to ZERO to power up this stage.
2.
Select the AGC amplifier through the INPUT
SOURCE MUX
—Bit INS0 controls the state of
the INPUT SOURCE MUX. This is bit D9 of
CFG0 and must be set to a ZERO to select
the AGC amplifier.
3.
Select the INPUT SOURCE MUX (only) to
the S1 SUMMING amplifier
—Bits S1M0 and
S1M1 control the state of the SUM1 SUM-
MING amplifier. These are bits D7 and D8 re-
spectively of CFG1 and they should be set
to the state where D7 is ZERO and D8 is ONE
to select the INPUT SOURCE MUX (only)
path.
4.
Select the SUM1 SUMMING amplifier path
through the FILTER MUX
—Bit FLS0 controls
the state of the FILTER MUX. This is bit D4 of
CFG1 and it must be set to ZERO to select
the SUM1 SUMMING amplifier path.
5.
Power up the LOWPASS FILTER—
Bit FLPD
controls the power up state of the LOW-
PASS FILTER stage. This is bit D1 of CFG1 and
it must be set to ZERO to power up the LOW
PASS FILTER STAGE.
6.
Select the 5.3 kHz sample rate
—Bits FLD0
and FLD1 select the Low Pass filter setting
and sample rate to be used during record
and playback. These are bits D2 and D3 of
CFG1. To enable the 5.3 kHz sample rate,
D2 must be set to ZERO and D3 set to ONE.
7.
Select the LOW PASS FILTER input (only) to
the S2 SUMMING amplifier
—Bits S2M0 and
S2M1 control the state of the SUM2 SUM-
MING amplifier. These are bits D5 and D6 re-
spectively of CFG1 and they should be set
to the state where D5 is ZERO and D6 is ONE
to select the LOW PASS FILTER (only) path.
To set up the chip for Memo Record, the configu-
ration registers are set up as follows:
CFG0=0010 0100 0010 0001 (hex 2421).
CFG1=0000 0001 0100 1000 (hex 0148).
Only those portions necessary for this mode are
powered up.
5.4
This mode sets the chip up for local playback of
messages recorded earlier. The playback path is
from the MULTILEVEL STORAGE ARRAY to the FILTER
MUX, then to the LOW PASS FILTER stage. From
there the audio path goes through the SUM2 SUM-
MING amplifier to the VOLUME MUX, through the
VOLUME CONTROL then to the SPEAKER output
stage. We will assume that we are driving a pizeo
speaker element. This audio was previously re-
corded at 8 kHz. All unnecessary stages will be
powered down.
MEMO AND CALL PLAYBACK
1.
Select the MULTILEVEL STORAGE ARRAY
path through the FILTER MUX
—Bit FLS0, the
state of the FILTER MUX. This is bit D4 of CFG1
and must be set to ONE to select the MULTI-
LEVEL STORAGE ARRAY.
2.
Power up the LOWPASS FILTER
—Bit FLPD
controls the power up state of the LOW-
PASS FILTER stage. This is bit D1 of CFG1 and
it must be set to ZERO to power up the LOW
PASS FILTER STAGE.
3.
Select the 8.0 kHz sample rate
—Bits FLD0
and FLD1 select the Low Pass filter setting
and sample rate to be used during record
and playback. These are bits D2 and D3 of
CFG1. To enable the 8.0 kHz sample rate,
D2 and D3 must be set to ZERO.
4.
Select the LOW PASS FILTER input (only) to
the S2 SUMMING amplifier
—Bits S2M0 and
S2M1 control the state of the SUM2 SUM-
MING amplifier. These are bits D5 and D6 re-
spectively of CFG1 and they should be set
相關(guān)PDF資料
PDF描述
ISD5100 SINGLE-CHIP 1 TO 16 MINUTES DURATION VOICE RECORD/PLAYBACK DEVICES WITH DIGITAL STORAGE CAPABILITY
ISD5116 Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability
ISD5116E Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability
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ISD5116EI Single-Chip Voice Record/Playback Device Up to 16-Minute Duration with Digital Storage Capability
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISD5008E 功能描述:IC VOICE REC/PLAY 4-8MIN 28-TSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000
ISD5008ED 功能描述:IC VOICE REC/PL 4-8MIN EX 28TSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000
ISD5008EDR 功能描述:IC VOICE REC/PL 4-8MIN EX 28TSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000
ISD5008EI 功能描述:IC VOICE REC/PL 4-8MIN IN 28TSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000
ISD5008EIR 功能描述:IC VOICE REC/PL 4-8MIN IN 28TSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISD5008 標(biāo)準(zhǔn)包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續(xù)時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:28-PDIP 其它名稱:90-21300+000
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