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參數(shù)資料
| 型號(hào)： | IMIB9847BY |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 12 INVERTED OUTPUT(S), PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大小： | 64K |
| 代理商： | IMIB9847BY |
B9847
Document #: 38-07197 Rev. **
Page 2 of 7
Note:
1.
PU = Internal Pull-up, typical value of 640K
.
A bypass capacitor (0.1
F) should be placed as close as possible to each positive power pin (<0.2”). If these bypass capacitors
are not close to the pins their high frequency filtering characteristic will be cancelled by the lead inductance of the traces.
Pin Description
Pin
Name
PWR
I/O[1]
Description
13
BUFIN
I
Clock Input. 2.5V for DDR-ONLY mode. 3.3V input for stan-
dard SDRAM mode.
28, 30, 34, 39, 43,
45
DDR(6:11)T
VDD2.5
O
DDR Clock Outputs
27, 29, 33, 38, 42,
44
DDR(6:11)C
VDD2.5
O
DDR Clock Outputs
4, 6, 10, 15, 19,
21
DDR(0:5)T /
SDRAM(0,2,4,6,8,
10)
VDD3.3_2.5
O
DDR/SDRAM Clock Outputs
5, 7,11,16,20, 22
DDR(0:5)C /
SDRAM(1,3,5,7,9,
11)
VDD3.3_2.5
O
DDR/SDRAM Clock Outputs
1
FBOUT
VDD3.3_2.5
O
Feedback Clock Output. This clock is for the chipset.
48
SEL_DDR
I, PU
DDR Select Input. When asserted HIGH, DDR-ONLY mode,
pins 4, 5, 6, 7, 10, 11, 15, 16, 19, 20, 21, 22, 27, 28, 29, 30,
33, 34, 38, 39, 42, 43, 44, and 45 are DDR outputs.
When set LOW, STANDARD SDRAM mode, pins 6, 7, 10, 11,
15, 16, 19, and 20 are SDRAM outputs. Pins 4, 5, 21, 22, 27,
28, 29, 30, 33, 34, 38, 39, 42, 43, 44, and 45 are low (off).
36
OE/PD#
I, PU
This is a dual-function pin. If during power-up OE is LOW,
then the outputs are three-stated. When OE goes HIGH the
outputs are enabled. Once HIGH, this pin becomes a Power
Down control (PD#). When PD# is then driven LOW, the out-
puts will be driven LOW.
25
SCLK
I, PU
Serial Clock Input. Clocks data at SDATA into the internal
register.
24
SDATA
I/O, PU
Serial Data Input. Input data is clocked to the internal register
to enable/disable individual outputs. This provides flexibility
in power management.
2, 8, 12, 17, 23
VDD3.3_2.5
2.5V Power Supply for DDR_ONLY mode. Connect to 3.3V
Power Supply.
32, 37, 41, 47
VDD2.5
2.5V Power Supply
3, 9, 14, 18, 26,
31, 35, 40, 46
VSS
Common Ground
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IMIB9940 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
| IMIB9940LBL | 制造商:Cypress Semiconductor 功能描述:Clock Driver 2-IN 32-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:CLOCK BUFFER.18 OUTPUTS, 200MHZ, 2.5V . - Bulk |
| IMIB9940LBLT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer |
| IMIB9946 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
| IMIB9946CA | 制造商:Cypress Semiconductor 功能描述:Logic ICS, 3.3V, 160MHz, 1:10 Clock Distribution Buffer 制造商:Rochester Electronics LLC 功能描述:CLOCK BUFFER.18 OUTPUTS, 160MHZ, 3.3V . - Bulk |
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