參數(shù)資料
型號(hào): IDT88P8342BHGI
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 80/98頁
文件大小: 0K
描述: IC SPI3-SPI4 EXCHANGE 820-PBGA
標(biāo)準(zhǔn)包裝: 24
系列: *
其它名稱: 88P8342BHGI
81
IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
11.5 DC Electrical characteristics
Parameter
Description
Min.
Typ.
Max.
Unit
Test Conditions
CMOS I/O
VIL
Input Low Voltage
-0.3
0.8
V
VIH
Input High Voltage
2.0
VD33+0.3
V
VOL
Output Low Voltage
VSS
0.4
V
VD33=min, IOL= max_load (Note 1)
VOH
Output High Voltage
2.4
VD33
VVD33=min, IOH= max_load (Note 1)
VRESETBH
RESETB Reset Input High Voltage
1.47
V
VRESETBL
RESETB Reset Input Low Voltage
0.95
V
VRESETBHYST RESETB Reset Input Hysteresis Voltage
0.53
V
IILPU
Input Low Current (with pullups)
-100
-50
-4
A
VIL=VSS
IILPU
Input High Current (with pullups)
-10
0
+10
A
VIL=VD33
IIL
Input Low Current (without pullups)
-10
0
+10
A
VIL=VSS
IIH
Input High Current (without pullups)
-10
0
+10
A
VIH=VD33
IOZ
Offstateoutputcurrent
-10
0
+10
A
VD33=MAX
LVTTL I/O
VIL
Input Low Voltage
-0.3
0.8
V
VIH
Input High Voltage
2.0
VD33+0.3
V
VOL
Output Low Voltage
VSS
0.4
V
VD33=MIN, IOL= 8mA
VOH
Output High Voltage
2.4
VD33
VVD33=MIN, IOH= -8mA
IL
Input Current
-5
0
+5
A
VD33=MAX
IOZ
Offstateoutputcurrent
-10
0
+10
A
VD33=MAX
SPI-4
LVDS I/O
Input
Characteristics
VIN
Input Voltage Range, VP or VN
0
2400
mV
|VGPG| < 925 mV
|VIDTH |
Differential Voltage Required to Toggle Input
100
mV
|VGPG| < 925 mV
VHYST
Input Differential Hysteresis, VIDTHH - VIDTHL
25
mV
RIN
InputDifferentialImpedance
90
100
110
Ohms
P to N input
Output
Characteristics
VOL
Output Low Voltage, VP or VN
925
mV
RDIFF_TERM = 100
VOH
Output High Voltage, VP or VN
1475
mV
RDIFF_TERM = 100
VOS
OutputOffsetVoltage
1125
1375
mV
RDIFF_TERM = 100
delta
VOS
Change in VOS between “0” and “1”
25
mV
RDIFF_TERM = 100
|VOD|
OutputDifferentialVoltage
250
450
mV
RDIFF_TERM = 100
|delta VOD|
Change in |VOD| between “0” and “1”
50 (DC)
150 (AC)
mV
RDIFF_TERM = 100
Ro
Output Single-ended Impedance
40
100
140
Ohms
delta
Ro
Ro mismatch between P and N
10
%
ISP, ISN
Output Short Circuit Current
40
mA
P or N output shorted to VSS
ISPN
Output Short Circuit Current
12
mA
P and N outputs shorted together
|IXP|, |IXN|
Power-off output leakage
10
AVD33 = VSS
NOTE
:
1. Maximum load = 8 mA for microprocessor data bus DBUS[7:0]; maximum load= 4 mA for all other CMOS outputs.
TABLE 131 – DC ELECTRICAL CHARACTERISTICS
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