參數(shù)資料
型號: IDT88P8342BHGI
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 42/98頁
文件大?。?/td> 0K
描述: IC SPI3-SPI4 EXCHANGE 820-PBGA
標準包裝: 24
系列: *
其它名稱: 88P8342BHGI
47
IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4
INDUSTRIALTEMPERATURERANGE
APRIL 10, 2006
Indirect High Address (register 0x35)
Indirect Low Address (register 0x34)
bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 2 bit 0
TABLE 20 - BIT ORDER WITHIN A 16-BIT ADDRESS REGISTER
Bit 15 is the most significant data bit.
Indirect Control (register 0x3F)
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 2 bit 0
TABLE 21 - BIT ORDER WITHIN
AN 8-BIT CONTROL REGISTER
Bit 7 is the most significant data bit.
Module base address (Module_base)
There are three modules defined for indirect data access.
MODULE
Module_base
Module A (SPI3-A, PFP-A, PMON-A)
0x0000
Module B (SPI3-B, PFP-B, PMON-B)
0x2000
Common (SPI-4, timing, PMON, clock, GPIO, and version number)
0x8000
TABLE 22 - MODULE BASE ADDRESS (MODULE_BASE)
Block base
There are block bases defined for SPI-3 modules and also for Common, as
shown in the following tables.
Block_base
Function
0x0000
SPI-3 ingress LP to LID registers
0x0200
SPI-3 ingress general configuration register
0x0500
SPI-3 egress LID to LP registers
0x0700
SPI-3 egress configuration registers
0x0A00
LID associated event counters
0x0C00
Non LID associated event counters
0x1000
SPI-3 ingress packet length configuration register
0x1100
SPI-4 egress port descriptor table
0x1200
SPI-3 ingress port descriptor tables
0x1300
SPI-3 to SPI-4 PFP and flow control registers
0x1600
SPI-4 ingress control registers
0x1700
SPI-3 egress port descriptor table
0x1800
SPI-4 ingress port descriptor table
0x1900
SPI-4 to SPI-3 PFP register
TABLE 23 - INDIRECT ACCESS BLOCK BASES FOR
MODULE A AND MODULE B
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