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參數(shù)資料
| 型號(hào)： | ICS950401 |
| 英文描述： | AMD - K8TM System Clock Chip |
| 中文描述： | AMD公司- K8TM系統(tǒng)時(shí)鐘芯片 |
| 文件頁(yè)數(shù)： | 9/14頁(yè) |
| 文件大?。?/td> | 108K |
| 代理商： | ICS950401 |
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9
ICS950401
0499C—11/01/04
Electrical Characteristics - CPUCLK
T
A
= 0 - 70o C; V
DD
= 3.3 V +/-5%; C
L
= 20 pF (unless otherwise stated)
PARAMETER
SYMBOL
Output Impedance
Z
O
Output High Voltage
V
OH2B
Output Low Voltage
V
OL2B
Output Low Current
I
OL2B
Rise Edge Rate
1
Fall Edge Rate
1
CONDITIONS
V
O
= V
X
MIN
15
1
TYP
MAX
55
1.2
0.4
UNITS
V
V
mA
V/ns
V
OL
= 0.3 V
18
2
Measured from 20-80%
7
Measured from 80-20%
Differential Voltage,
Measured @ the Hammer
test load (single-ended
measurement)
2
7
V/ns
V
DIFF
0.4
2.3
V
V
DIFF
Change in V
DIFF_DC
magnitude, Measured @ the
Hammer test load (single-
ended measurement)
-150
150
mV
V
CM
Common Mode Voltage,
Measured @ the Hammer
test load (single-ended
measurement)
Change in Common Mode
Voltage, Measured @ the
Hammer test load (single-
ended measurement)
V
T
= 50%
V
T
= V
X
1.05
1.45
V
V
CM
-200
200
mV
Duty Cycle
1
Jitter, Cycle-to-cycle
1
Notes:
1 - Guaranteed by design, not 100% tested in production.
2 - V
DIF
specifies the minimum input differential voltages (V
TR
-V
CP
) required for switching, where V
TR
is the "true"
input level and V
CP
is the "complement" input level.
d
t2B
45
0
53
200
%
ps
t
jcyc-cyc2B
3 - Vpullup
(external)
= 1.5V, Min = Vpullup
(external)
/2-150mV; Max=(Vpullup
(external)
/2)+150mV
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| ICS950402 | AMD - K8 System Clock Chip |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ICS950402 | 制造商:ICS 制造商全稱:ICS 功能描述:AMD - K8 System Clock Chip |
| ICS950402YFLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:AMD - K8 System Clock Chip |
| ICS950402YGLF-T | 制造商:ICS 制造商全稱:ICS 功能描述:AMD - K8 System Clock Chip |
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