參數(shù)資料
型號(hào)： ICS1893AFLF
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 48/136頁
文件大小： 0K
描述： PHYCEIVER LOW PWR 3.3V 48-SSOP
標(biāo)準(zhǔn)包裝： 30
系列： PHYceiver™
類型： PHY 收發(fā)器
規(guī)程： MII
電源電壓： 3.14 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 48-BSSOP（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 48-SSOP
包裝： 管件
其它名稱： 1893AFLF
800-2353-5
ICS1893AFLF-ND
Chapter 5
Operating Modes Overview
ICS1893AF, Rev. D 10/26/04
October, 2004
19
ICS1893AF Data Sheet - Release
Copyright 2004, Integrated Circuit Systems, Inc.
All rights reserved.
5.1
Reset Operations
This section first discusses reset operations in general and then specific ways in which the ICS1893AF can
be configured for various reset options.
5.1.1
General Reset Operations
The following reset operations apply to all the specific ways in which the ICS1893AF can be reset, which
5.1.1.1
Entering Reset
When the ICS1893AF enters a reset condition (either through hardware, power-on reset, or software), it
does the following:
1.
Isolates the MAC/Repeater Interface input pins
2.
Drives all MAC/Repeater Interface output pins low
3.
Tri-states the signals on its Twisted-Pair Transmit pins (TP_TXP and TP_TXN)
4.
Initializes all its internal modules and state machines to their default states
5.
Enters the power-down state
6.
Initializes all internal latching low (LL), latching high (LH), and latching maximum (LMX) Management
Register bits to their default values
5.1.1.2
Exiting Reset
When the ICS1893AF exits a reset condition, it does the following:
1.
Exits the power-down state
2.
Latches the Serial Management Port Address of the ICS1893AF into the Extended Control Register,
3.
Enables all its internal modules and state machines
4.
Sets all Management Register bits to either (1) their default values or (2) the values specified by their
associated ICS1893AF input pins, as determined by the HW/SW pin
5.
Enables the Twisted-Pair Transmit pins (TP_TXP and TP_TXN)
6.
Resynchronizes both its Transmit and Receive Phase-Locked Loops, which provide its transmit clock
(TXCLK) and receive clock (RXCLK)
7.
Releases all MAC/Repeater Interface pins, which takes a maximum of 640 ns after the reset condition
is removed
5.1.1.3
Hot Insertion
As with the ICS189X products, the ICS1893AF reset design supports ‘hot insertion’ of its MII. (That is, the
ICS1893AF can connect its MAC/Repeater Interface to a MAC/repeater while power is already applied to
the MAC/repeater.)
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ICS1893AFLFT 功能描述:PHYCEIVER LOW PWR 3.3V 48-SSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:PHYceiver™ 標(biāo)準(zhǔn)包裝:250 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
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ICS1893AGI 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
ICS1893AGILF 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM
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