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| 型號(hào)： | IC_SS |
| 文件頁數(shù)： | 4/36頁 |
| 文件大?。?/td> | 480K |
| 代理商： | IC_SS |
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Pin Descriptions
Tables I, II and III describe the various pins that are used for
external connections outside of the chip set. These pins are
shown in the Connection Diagrams.
Type
One of the following:
I
Input
O
Output
T
TRI-STATE
é
P
Power
Function
A brief description of each signal’s function.
TABLE I. ICSS1001 Pin Descriptions
Pin Name
Pin No.
Type
Function
SO/G4
1
O
MICROWIRE
TM
SO to digital ASIC
SK/G5
2
O
MICROWIRE clock to digital ASIC
SI/G6
3
I
MICROWIRE SI from digital ASIC
G7
4
O
Overflow of A/D converter from analog ASIC
CKI
5
l
8 MHz clock input from digital ASIC
V
CC
6
P
Input power
I0
7
I
RAW DATA input from digital ASIC
I1
8
O
RxRDY handshake line for parallel port
I2
9
I
SER/PAR-input read after reset determines whether firmware will use serial or parallel host
port. HIGH
e
serial
I3
10
I
NET/TRN-input read continuously. If HIGH and serial port is selected commands are
processed; if LOW, all received characters are treated as transparent data. If parallel port is
selected, this pin has no effect.
L0
11
I
RTS flow control from host. If serial port is selected (pin 9
e
HIGH), LOW enables output of
data on RCD and HIGH prevents output on RCD. A byte in the process of being output when
RTS goes HIGH will be completed. RTS has no effect if parallel port is selected.
If parallel is selected (pin 9
e
LOW), COMMAND HIGH denotes the presence of a command
in the parallel port input buffer. LOW denotes the presence of data.
L1
12
O
CTS flow control to host. Normally LOW. If serial port is selected (pin 9
e
HIGH) then HIGH
indicates host should not send data to TXD. A maximum of three bytes will be accepted after a
transition from LOW to HIGH.
If parallel port is selected (pin 9
e
LOW), then STATUS HIGH denotes that the byte available
for the host to read is a status code. A LOW denotes that the available byte is data.
L2
13
O
RCD receive data output to host, in byte asynchronous format, 8 data bits, parity one start and
one stop bit. Active baud rate and parity default is 1200 baud, no parity. Other settings may be
selected by DIP switch. Active only if serial port is selected.
L3
14
I
TXD transmit data input from host
L4
15
O
LTXD CLK serial data clock for data to be transmitted by the digital ASIC, not Manchester-
encoded
L5
16
O
TxRDY handshake line for parallel port
L6
17
O
PTT Active LOW places digital chip in transmit mode
L7
18
O
LTXD serial data to be transmitted by digital ASIC, not Manchester-encoded. Active HIGH.
ASIC Manchester-encodes the data using LTXD CLK.
D0
19
O
CSD digital ASIC internal MlCROWIRE register address selection
D1
20
O
CSD1 digital ASIC internal MlCROWIRE register address selection
D2
21
O
CSD2 digital ASIC internal MICROWIRE register address selection
D3
22
O
STROBE MICROWIRE output to digital ASIC
GROUND
23
P
Ground
RESET
24
I
RESET from digital chip
4
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