參數(shù)資料
型號: HYB25R128160C-840
英文描述: RAMBUS DRAM
中文描述: Rambus的內(nèi)存
文件頁數(shù): 42/76頁
文件大小: 1218K
代理商: HYB25R128160C-840
HYB25D128400/800/160AT(L)
128-Mbit Double Data Rate SDRAM
Page 42 of 76
2002-05-06
Write to Precharge: Nominal DQSS (2 bit Write), Interrupting (Burst Length = 4 or 8)
DI a-b = Data In for bank a, column b.
An interrupted burst is shown, 2 data elements are written.
1 subsequent element of data in is applied in the programmed order following DI a-b.
t
W
R
is referenced from the first positive CK edge after the last desired data in pair.
The Precharge command masks the last 2 data elements in the burst.
A10 is Low with the
W
rite command (Auto Precharge is disabled).
1 = Can be don
'
t care for programmed burst length of 4.
2 = For programmed burst length of 4, DQS becomes don
'
t care at this point.
3 = These bits are incorrectly written into the memory array if DM is low.
Don’t Care
T1
T2
T3
T4
T5
T6
N
OP
N
OP
N
OP
PR
E
W
rite
N
OP
CK
CK
Command
Address
BA a, COL b
BA (a or all)
t
RP
t
DQSS
(nom)
DI a-b
1
2
DQS
DQ
DM
1
t
W
R
3
3
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