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| 型號： | HYB25L128160AC |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 128-MBIT SYNCHRONOUS LOW-POWER DRAM IN CHIPSIZE PACKAGES |
| 中文描述： | 128 - Mbit同步低功率DRAM在CHIPSIZE套票 |
| 文件頁數(shù)： | 7/50頁 |
| 文件大小： | 980K |
| 代理商： | HYB25L128160AC |
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HYB/E 25L128160AC
128-MBit Mobile-RAM
INFINEON Technologies
7
2003-02
Operation Definition
All of SDRAM operations are defined by states of control signals CS, RAS, CAS, WE, and DQMx at
the positive edge of the clock. The following list shows the truth table for the operation commands.
Notes:
1. V = Valid, x = Don
’
t Care, L = Low Level, H = High Level.
2. CKEn signal is input level when commands are provided, CKEn-1 signal is input level one clock before the
commands are provided.
3. This is the state of the banks designated by BA0, BA1 signals.
4. Power Down Mode can not entry in the burst cycle. Address Input for Mode Set (Mode Register Operation)
5. After Deep Power Down mode exit a full new initialisation of the memory device is mandatory.
2SHUDWLRQ
Device
State
CKE
n-1
CKE
n
DQM
BA0
BA1
AP=
A10
Addr
CS
RAS
CAS
WE
Bank Active
Idle
3
H
X
X
V
V
V
L
L
H
H
Bank Precharge
Any
H
X
X
V
L
X
L
L
H
L
Precharge All
Any
H
X
X
X
H
X
L
L
H
L
Write
Active
3
H
X
X
V
L
V
L
H
L
L
Write with Autoprecharge
Active
3
H
X
X
V
H
V
L
H
L
L
Read
Active
3
H
X
X
V
L
V
L
H
L
H
Read with Autoprecharge
Active
3
H
X
X
V
H
V
L
H
L
H
Mode Register Set
Idle
H
X
X
V
V
V
L
L
L
L
No Operation
Any
H
X
X
X
X
X
L
H
H
H
Burst Stop
Active
H
X
X
X
X
X
L
H
H
L
Device Deselect
Any
H
X
X
X
X
X
H
X
X
X
Auto Refresh
Idle
H
H
X
X
X
X
L
L
L
H
Self Refresh Entry
Idle
H
L
X
X
X
X
L
L
L
H
Self Refresh Exit
Idle
(Self
Refr.)
L
H
X
X
X
X
H
X
X
X
L
H
H
X
Power Down Entry
(Precharge or active
standby)
Idle
H
L
X
X
X
X
H
X
X
X
Active
4
L
H
H
H
Power Down Exit
Any
(Power
Down)
L
H
X
X
X
X
H
X
X
X
L
H
H
L
Data Write/Output Enable
Active
H
X
L
X
X
X
X
X
X
X
Data Write/Output Disable
Active
H
X
H
X
X
X
X
X
X
X
Deep Power Down Entry
Idle
H
L
X
X
X
X
L
H
H
L
Deep Power Down Exit
Deep
5
Power
Down
L
H
X
X
X
X
X
X
X
X
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYB25L128160AC-8 | 128-MBIT SYNCHRONOUS LOW-POWER DRAM IN CHIPSIZE PACKAGES |
| HYE25L128160AC-8 | 128-MBIT SYNCHRONOUS LOW-POWER DRAM IN CHIPSIZE PACKAGES |
| HYB25L128160AC-7.5 | HEX DIE SET,.052/.068/.100/.21 |
| HYE25L128160AC-7.5 | HEX DIE SET,.052/.068/.178/.25 |
| HYE25L128160AC-75 | 128-MBIT SYNCHRONOUS LOW-POWER DRAM IN CHIPSIZE PACKAGES |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYB25L256160AC-7.5 | 制造商:Infineon Technologies AG 功能描述: |
| HYB25L512160AC-7.5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HYB3116160BSJ | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
| HYB3116160BSJ-50 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
| HYB3116160BSJ-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh |
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