參數(shù)資料
型號(hào): HY5DV641622AT-33
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 64M(4Mx16) DDR SDRAM
中文描述: 4M X 16 DDR DRAM, 0.5 ns, PDSO66
封裝: 0.400 X 0.875 INCH, 0.65 MM PITCH, TSOP2-66
文件頁數(shù): 12/27頁
文件大?。?/td> 276K
代理商: HY5DV641622AT-33
Rev. 0.7/May. 02
12
HY5DV641622AT
OPERATION COMMAND TRUTH TABLE - IV
Note :
1. H - Logic High Level, L - Logic Low Level, X - Don’t Care, V - Valid Data Input,
BA - Bank Address, AP - AutoPrecharge Address, CA - Column Address, RA - Row Address, NOP - NO Operation.
2. All entries assume that CKE was active(high level) during the preceding clock cycle.
3. If both banks are idle and CKE is inactive(low level), then in power down mode.
4. Illegal to bank in specified state. Function may be legal in the bank indicated by Bank Address(BA) depending on the state of
that bank.
5. If both banks are idle and CKE is inactive(low level), then self refresh mode.
6. Illegal if tRCD is not met.
7. Illegal if tRAS is not met.
8. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
9. Illegal if tRRD is not met.
10. Illegal for single bank, but legal for other banks in multi-bank devices.
11. Illegal for all banks.
Current
State
/CS
/RAS
/CAS
/WE
Address
Command
Action
WRITE
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
ILLEGAL
11
L
L
H
H
BA, RA
ACT
ILLEGAL
11
L
L
H
L
BA, AP
PRE/PALL
ILLEGAL
11
L
L
L
H
X
AREF/SREF
ILLEGAL
11
L
L
L
L
OPCODE
MRS
ILLEGAL
11
MODE
REGISTER
ACCESSING
H
X
X
X
X
DSEL
NOP - Enter IDLE after tMRD
L
H
H
H
X
NOP
NOP - Enter IDLE after tMRD
L
H
H
L
X
BST
ILLEGAL
11
L
H
L
H
BA, CA, AP
READ/READAP
ILLEGAL
11
L
H
L
L
BA, CA, AP
WRITE/WRITEAP
ILLEGAL
11
L
L
H
H
BA, RA
ACT
ILLEGAL
11
L
L
H
L
BA, AP
PRE/PALL
ILLEGAL
11
L
L
L
H
X
AREF/SREF
ILLEGAL
11
L
L
L
L
OPCODE
MRS
ILLEGAL
11
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