參數(shù)資料
型號(hào)： HY57W2A1620HCLT-B
英文描述： x16 SDRAM
中文描述： x16內(nèi)存
文件頁(yè)數(shù)： 12/24頁(yè)
文件大?。?/td> 221K
代理商： HY57W2A1620HCLT-B
HY5W2A6C(L/S)F / HY57W2A1620HC(L/S)T
HY5W26CF / HY57W281620HCT
Rev. 1.2 / Nov. 01
13
CURRENT STATE TRUTH TABLE
(Sheet 3 of 3)
Current State
Command
Action
Notes
CS
L
L
L
L
L
RAS CAS WE BA0,BA1
L
L
L
L
L
H
X
L
H
L
L
H
H
BA
H
L
L
A11-A0
Description
Mode Register Set
Auto or Self Refresh ILLEGAL
Precharge
Row Add.
Bank Activate
Col Add.
A10
Col Add.
A10
X
No Operation
Write
Recovering
OP Code
ILLEGAL
13,14
13
4,13
4,12
X
X
BA
ILLEGAL
ILLEGAL
Start Write: Optional
AP(A10=H)
Start Read: Optional
AP(A10=H)
No Operation: Row Active
after tDPL
No Operation: Row Active
after tDPL
ILLEGAL
BA
Write/WriteAP
L
H
L
H
BA
Read/ReadAP
9
L
H
H
H
X
H
X
X
X
X
X
Device Deselect
Write
Recovering
with
Auto
Precharge
L
L
L
L
L
L
L
L
H
H
L
L
H
X
L
H
BA
L
BA
OP Code
Mode Register Set
Auto or Self Refresh ILLEGAL
13,14
13
4,13
4,12
4,12
L
L
L
H
X
X
Row Add.
Bank Activate
Col Add.
A10
Col Add.
A10
X
No Operation
BA
Precharge
ILLEGAL
ILLEGAL
ILLEGAL
Write/WriteAP
L
H
L
H
BA
Read/ReadAP
ILLEGAL
4,9,12
L
H
H
H
X
No Operation: Precharge
after tDPL
No Operation: Precharge
after tDPL
ILLEGAL
H
X
X
X
X
X
Device Deselect
Refreshing
L
L
L
L
L
L
L
L
L
H
H
L
L
H
X
L
H
BA
L
BA
OP Code
Mode Register Set
Auto or Self RefreshILLEGAL
Precharge
Row Add.
Bank Activate
Col Add.
A10
Col Add.
A10
X
No Operation
X
Device Deselect
OP Code
Mode Register Set
H
X
X
Auto or Self RefreshILLEGAL
L
BA
X
Precharge
H
H
BA
Row Add.
Bank Activate
L
L
BA
Col Add.
A10
L
H
BA
Col Add.
A10
H
H
X
X
13,14
13
13
13
13
X
X
L
L
H
BA
ILLEGAL
ILLEGAL
ILLEGAL
Write/WriteAP
L
H
L
H
BA
Read/ReadAP
ILLEGAL
13
L
H
X
L
L
L
L
L
H
H
X
L
L
H
H
X
X
X
L
No Operation: idle after tRC
No Operation: idle after tRC
ILLEGAL
Mode
Register
Accessing
L
L
L
L
H
13,14
13
13
13
13
ILLEGAL
ILLEGAL
ILLEGAL
Write/WriteAP
L
H
Read/ReadAP
ILLEGAL
13
L
H
No Operation
No Operation: idle after 2
clock cycles
No Operation: idle after 2
clock cycles
H
X
X
X
X
X
Device Deselect
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