HT82M9BEE/HT82M9BAE
Rev. 1.20
17
August 13, 2007
also depends on the control register. If the control regis-
ter bit is 1 , the input will read the pad state. If the con-
trol register bit is 0 , the contents of the latches will
move to the internal bus. The latter is possible in the
read-modify-write
CMOS/NMOS/PMOS configurations can be selected
(NMOS and PMOS are available for PA only). These
control registers are mapped to locations 13H 15H and
17H.
instruction. For output function,
Afterachipreset,theseinput/outputlinesremainathigh
levels or in a floating state (depending on the
pull-high/low options). Each bit of these input/output
latches can be set or cleared by SET [m].i and CLR
[m].i (m=12H, 14H or 16H) instructions.
Some instructions first input data and then follow the
output operations. For example,
SET [m].i ,
CLR
[m].i , CPL [m] , CPLA [m] read the entire port states
into the CPU, execute the defined operations
(bit-operation), and then write the results back to the
latches or the accumulator.
Each line of PA0~PA7, PB4/SDA and PB7/SCL has the
capability of waking-up the device.
There are pull-high/low options available for I/O lines.
Once the pull-high/low option of an I/O line is selected,
the I/O line have pull-high/low resistor. Otherwise, the
pull-high/low resistor is absent. It should be noted that a
non-pull-high/low I/O line operating in input mode will
cause a floating state.
It is recommended that unused or not bonded out I/O
linesshouldbesetasoutputpinsbysoftwareinstruction
to avoid consuming power under input floating state.
Low Voltage Reset
LVR
The microcontroller contains a low voltage reset circuit
inordertomonitorthesupplyvoltageofthedevice.Ifthe
supply voltage of the device drops to within the range of
0.9V~V
LVR
such as might occur when changing the bat-
tery, the LVR will automatically reset the device inter-
nally.
The LVR includes the following specifications:
ForavalidLVRsignal,alowvoltage(0.9V~V
LVR
)must
exist for more than 1ms. If the low voltage state does
not exceed 1ms, the LVR will ignore it and will not per-
form a reset function.
The LVR uses the OR function with the external
RES signal to perform a chip reset.
TherelationshipbetweenV
DD
andV
LVR
isshownbelow.
Note: V
OPR
is the voltage range for proper chip opera-
tion at 6MHz or 12MHz system clock.
3 ' 3
1 ' 6
"
3 ' 3
' 5
' .
3 ' 3
"
1 ' 6
1
-
0
F
F
0 -
"
-
-
0
Low Voltage Reset
Note: *1: To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024 system
clock pulses before entering the normal operation.
*2: A low voltage has to exist for more than 1ms, after that 1ms delay, the device enters a reset mode.