參數資料
型號： HT82J30A
廠商： Holtek Semiconductor Inc.
英文描述： 16 Channel A/D MCU with SPI Interface
中文描述： 16通道A / D轉換，SPI接口單片機
文件頁數： 18/47頁
文件大小： 312K
代理商： HT82J30A
HT82J30R/HT82J30A
Rev. 1.00
18
December 20, 2006
A/D Converter
A16 channel 8-bit resolution A/D converter is integrated
within the microcontroller. The A/D reference voltage is
VDD. The A/D converter contains several special regis-
ters, which are ADR, ADCR and ACSR. The ADR regis-
ter is the A/D result register and is read-only. After an
A/D conversion has completed, the ADR register is read
to obtain the conversion result data. The EOCB flag will
also be automatically cleared to indicate the end of con-
version. The ADCR register is the A/D converter control
register, which selects the analog channel, contains the
start A/D conversion control bit and the end of A/D con-
version flag. To initiate an A/D conversion, the analog
channel is first selected and then the START bit is given
a falling edge. When the conversion is complete, the
EOCB bit will be cleared and an A/D converter interrupt
is generated. The ACSR register selects the A/D clock
source as well as selecting which pins are to be used as
A/D inputs. Bits 0~3 of ADCR are used to select an ana-
log input channel. There are a total of 16 channels to se-
lect. Bits 3~6 of ADSR are used to select which pins on
Port B and Port C are setup as normal I/Os or A/D in-
puts. The EOCB bit in the ADCR registers, is end of A/D
conversion flag. This bit can be monitored to check
whentheA/Dconversionhascompleted.TheSTARTbit
in the ADCR register is used to initiate A/D conversion
process. Providing the START bit with a rising edge will
reset and start the A/D conversion. When checking for
the end of an A/D conversion, the START bit should re-
mainat 0 andtheEOCBbitmonitoreduntilitiscleared
to 0 which indicates the end of conversion.
Bit 7 of the ACSR register is used for testing purposes
only and should not be used. Bits 1 and bit 0 are used to
select the A/D converter clock source.
When the A/D conversion has completed, the A/D inter-
rupt request flag is set. The EOCB bit is set to 1 auto-
matically when the START bit is set to 1 .
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
D7
D6
D5
D4
D3
D2
D1
D0
ADR (21H) Register
ACS3
ACS2
ACS1
ACS0
Analog Channel
0
0
0
0
AN0
0
0
0
1
AN1
0
0
1
0
AN2
0
0
1
1
AN3
0
1
0
0
AN4
0
1
0
1
AN5
0
1
1
0
AN6
0
1
1
1
AN7
1
0
0
0
AN8
1
0
0
1
AN9
1
0
1
0
AN10
1
0
1
1
AN11
1
1
0
0
AN12
1
1
0
1
AN13
1
1
1
0
AN14
1
1
1
1
AN15
Bit No.
Label
Function
0~3
ACS0~
ACS3
Analog channel selection
4~5
Reserved bit
6
EOCB
Indicates end of A/D conversion (read only). (0 = end of A/D conversion)
7
START
StartstheA/Dconversion.(0
1
0=start;0
1=ResetA/DconverterandsetEOCBto 1 )
ADCR (22H) Register
Bit No.
Label
Function
0
1
ADCS0
ADCS1
ADCS1,ADCS0 : Selects the A/D converter clock source
0, 0: f
SYS
/2
0, 1: f
SYS
/8
1, 0: Undefined
1, 1: Undefined (f
WDT
for test only)
2
Unused bit, read as 0 .
3~6
PCR0~
PCR3
Port B & Port C configuration selection.
If PCR0, PCR1 and PCR2, PCR3 are all zero, the ADC circuit is power off to reduce power
consumption
7
TEST
For internal test only, read as 1 .
ACSR (23H) Register
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