HT48RA3
Rev. 1.20
15
May 12, 2003
After a chip reset, these input/output lines stay at high
levels (pull-high options) or floating state (non-pull-high
options). Each bit of these input/output latches can be
set or cleared by SET [m].i (m = 12H, 14H, 16H or
1CH) instructions. Some instructions first input data and
then follow the output operations. For example, SET
[m].i ,
states into the CPU, execute the defined operations
(bit-operation), and then write the results back to the
latches or the accumulator.
CLR [m].i ,
CPLA [m]
read the entire port
Each line of port A has the capability of waking-up the
device. The highest 2 bits of port C and 7 bits of port F
arenotphysicallyimplemented;onreadingthema 0 is
returned whereas writing then results in a no-operation.
Pull-high resistors of each port are decided by a option
bit.
The PB0 is pin-shared with PFD signal, respectively. If
the PFD option is selected, the output signal in output
mode of PB0 will be the PFD signal. The input mode al-
ways remain its original functions. The PF0 and PC0 are
pin-shared with INT and TMR0. The INT signal is di-
rectly connected to PF0. The PFD output signal (in out-
put mode) are controlled by the PB0 data register only.
The truth table of PB0/PFD is listed below.
The truth table of PB0/PFD is as shown.
PBC (15H) Bit0
I
O
O
O
PB0/PFD Option
x
PB0
PFD
PFD
PB0 (14H) Bit0
x
D
0
1
PB0 Pad Status
I
D
0
PFD
Note:
I: Input; O: Output; D: Data
Bank Pointer
There is a bank pointer used to control the program flow
to go to any banks. A bank contains 8K 16 address
space. The contents of bank pointer are load into pro-
gram counter when the JMP or CALL instruction is exe-
cuted. The program counter is a 15-bit register whose
contents are used to specify the executed instruction
addresses.
When calling a subroutine or an interrupt event occur-
ring, the contents of the program counter are save into
stack registers. If a returning from subroutine occurs,
the contents of the program counter will restore from
stack registers.
Options
The following table shows all kinds of code option in the
MCU. All of the mask options must be defined to ensure
proper system functioning.
Function
PA0~PA7 wake-up enable or disable options
PC pull-high enable or disable
PA pull-high enable or disable: Byte option
PF pull-high enable or disable
PBpull-high(PB0~PB3,PB4~PB7)enableordisable:
Nibble option
PB0 or PFD
CLR WDT instructions
System oscillators: RC or crystal
WDT enable or disable
WDT clock source: WDTOSC or system clock/4