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參數(shù)資料
| 型號： | HT48RA3 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit Remote Type OTP MCU |
| 中文描述： | 8位單片機的遠程型檢察官辦公室 |
| 文件頁數(shù)： | 10/36頁 |
| 文件大?。?/td> | 245K |
| 代理商： | HT48RA3 |
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HT48RA3
Rev. 1.20
10
May 12, 2003
The system can leave the HALT mode by means of an
external reset, an interrupt, an external falling edge sig-
nal on port A or a WDT overflow. An external reset
causes a device initialization and the WDT overflow per-
forms a warm reset . After the TO and PD flags are ex-
amined, the reason for chip reset can be determined.
The PD flag is cleared by system power-up or executing
the CLR WDT instruction and is set when executing
the HALT instruction. The TO flag is set if the WDT
time-out occurs, and causes a wake-up that only resets
thePCandSP;theothersremainintheiroriginalstatus.
The port A wake-up and interrupt methods can be con-
sidered as a continuation of normal execution. Each bit
in port A can be independently selected to wake up the
devicebymaskoption.AwakeningfromanI/Oportstim-
ulus, the program will resume execution of the next in-
struction. If it awakens from an interrupt, two sequence
may occur. If the related interrupt is disabled or the inter-
rupt is enabled but the stack is full, the program will re-
sume execution at the next instruction. If the interrupt is
enabled and the stack is not full, the regular interrupt re-
sponse takes place. If an interrupt request flag is set to
1 before entering the HALT mode, the wake-up func-
tion of the related interrupt will be disabled. Once a
wake-up event occurs, it takes 1024 t
SYS
(system clock
period) to resume normal operation. In other words, a
dummy period will be inserted after a wake-up. If the
wake-up results from an interrupt acknowledge signal,
the actual interrupt subroutine execution will be delayed
by one or more cycles. If the wake-up results in the next
instruction execution, this will be executed immediately
after the dummy period is finished.
To minimize power consumption, all the I/O pins should
be carefully managed before entering the HALT status.
Reset
Therearethreewaysinwhicharesetcanoccur:
RES reset during normal operation
RES reset during HALT
WDT time-out reset during normal operation
The WDT time-out during HALT is different from other
chip reset conditions, since it can perform a warm re -
set thatresetsonlythePCandSP,leavingtheothercir-
cuits in their original state. Some registers remain un-
changed during other reset conditions. Most registers
are reset to the initial condition when the reset condi-
tions are met. By examining the PD and TO flags, the
programcandistinguishbetweendifferent chipresets .
TO
PD
RESET Conditions
0
0
RES reset during power-up
u
u
RES reset during normal operation
0
1
RES wake-up HALT
1
u
WDT time-out during normal operation
1
1
WDT wake-up HALT
Note: u stands for unchanged
To guarantee that the system oscillator is started and
stabilized, the SST (System Start-up Timer) provides an
extra-delay of 1024 system clock pulses when the sys-
tem reset (power-up, WDT time-out or RES reset) or the
system awakes from the HALT state.
When a system reset occurs, the SST delay is added
during the reset period. Any wake-up from HALT will en-
able the SST delay.
The functional unit chip reset status are shown below.
PC
000H
Interrupt
Disable
Prescaler
Clear
WDT
Clear. After master reset,
WDT begins counting
Timer/event Counter
Off
Input/output Ports
Input mode
SP
Pointstothetopofthestack
!
, #
9
!
) # " , ,
!
Reset timing chart
Reset circuit
+
,
!
+
= $ (
'
!
&
!
,
!
9 < # ! ,
# " "
!
Reset configuration
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|---|---|
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HT48RA3_07 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Remote Type 8-Bit MCU |
| HT48RA3_09 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:HT48RA3/HT48CA3 |
| HT48RA5 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Remote Type 8-Bit MCU |
| HT48RA5_07 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Remote Type 8-Bit MCU |
| HT48RA5_09 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:Remote Type 8-Bit MCU |
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