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參數(shù)資料
| 型號： | HT48E06 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit I/O Type MCU (With EEPROM) |
| 中文描述： | 8位I / O型微控制器（帶EEPROM） |
| 文件頁數(shù)： | 8/43頁 |
| 文件大小： | 346K |
| 代理商： | HT48E06 |
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HT48E06
Rev. 0.00
8
January 12, 2004
Preliminary
Stack Register
STACK
This is a special part of the memory which is used to
save the contents of the program counter (PC) only. The
stack is organized into 4 levels and is neither part of the
data nor part of the program space, and is neither read-
able nor writeable. The activated level is indexed by the
stack pointer (SP) and is neither readable nor writeable.
At a subroutine call or interrupt acknowledge signal, the
contents of the program counter are pushed onto the
stack. At the end of a subroutine or an interrupt routine,
signaled by a return instruction (RET or RETI), the pro-
gram counter is restored to its previous value from the
stack.Afterachipreset,theSPwillpointtothetopofthe
stack.
If the stack is full and a non-masked interrupt takes
place, the interrupt request flag will be recorded but the
acknowledge signal will be inhibited. When the stack
pointer is decremented (by RET or RETI), the interrupt
will be serviced. This feature prevents stack overflow al-
lowing the programmer to use the structure more easily.
In a similar case, if the stack is full and a CALL is sub-
sequently executed, stack overflow occurs and the first
entry will be lost (only the most recent 2 return ad-
dresses are stored).
Data Memory
RAM
The data memory has a capacity of 81 8 bits and is di-
vided into two functional groups: special function regis-
ters and general purpose data memory (64 8). Most
are read/write, but some are read only.
The special function registers include the indirect ad-
dressing registers (R0;00H), timer/event counter
(TMR;0DH), timer/event counter control register
(TMRC;0EH), program counter lower-order byte regis-
ter (PCL;06H), memory pointer registers (MP;01H), ac-
cumulator (ACC;05H), table pointer (TBLP;07H), table
higher-order byte register (TBLH;08H), status register
(STATUS;0AH), interrupt control register (INTC;0BH),
Watchdog Timer option setting register (WDTS;09H),
I/O registers (PA;12H, PB;14H, PC;16H) and I/O con-
trol registers (PAC;13H, PBC;15H, PCC;17H). The re-
maining space before the 40H is reserved for future
expanded usage and reading these locations will re-
turn the result
memory, addressed from 40H to 7FH, is used for data
and control information under instruction commands.
00H . The general purpose data
All of the data memory areas can handle arithmetic,
logic, increment, decrement and rotate operations di-
rectly. Except for some dedicated bits, each bit in the
data memory can be set and reset by SET [m].i and
CLR [m].i . They are also indirectly accessible through
memory pointer registers (MP). The control register of
theEEPROMdatamemoryislocatedat[40H]inBank1.
Indirect Addressing Register
Location 00H and 02H are indirect addressing registers
that are not physically implemented. Any read/write op-
eration on [00H] and [02H] access the RAM pointed to
by MP0 (01H) and MP1 (03H) respectively. Reading lo-
cation 00H or 02H indirectly returns the result 00H. Writ-
ing indirectly results in no operation. The function of
data movement between two indirect addressing regis-
ters is not supported. The memory pointer registers,
MP0 and MP1, are both 7-bit registers used to access
the RAM by combining corresponding indirect address-
ing registers. MP0.7 and MP1.7 are always 1 . MP0
can only be applied to data memory in Bank 0, while
MP1 can be applied to data memory in Bank 0 and
Bank1.
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RAM Mapping
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| HT48E10 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O Type 8-Bit MTP MCU With EEPROM |
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| HT48E30 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O Type 8-Bit MTP MCU With EEPROM |
| HT48E50 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O Type 8-Bit MTP MCU With EEPROM |
| HT48E70 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O Type 8-Bit MTP MCU With EEPROM |
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