HT46R63/HT46C63
Rev. 1.90
8
May 17, 2004
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Execution Flow
Mode
Program Counter
*11~*8
*7
*6
*5
*4
*3
*2
*1
*0
Initial Reset
0000
0
0
0
0
0
0
0
0
External Interrupt 0
0000
0
0
0
0
0
1
0
0
External Interrupt 1
0000
0
0
0
0
1
0
0
0
Timer/Event Counter Overflow
0000
0
0
0
0
1
1
0
0
Time Base Time-out
0000
0
0
0
1
0
0
0
0
A/D Interrupt
0000
0
0
0
1
0
1
0
0
RTC Interrupt
0000
0
0
0
1
1
0
0
0
Skip
PC+2
Loading PCL
@11~@8
@7
@6
@5
@4
@3
@2
@1
@0
Jump, Call Branch
#11~#8
#7
#6
#5
#4
#3
#2
#1
#0
Return (RET, RETI)
S11~S8
S7
S6
S5
S4
S3
S2
S1
S0
Program Counter
Note:
*11~*0: Program counter bits
S11~S0: Stack register bits
#11~#0: Instruction code bits
@7~@0: PCL bits
Functional Description
Execution Flow
The system clock for the microcontroller is derived from
an external RC or crystal oscillator. The system clock is
internally divided into four non-overlapping clocks. One
instruction cycle consists of 4 system clock cycles.
Instruction fetching and execution are pipelined in such
a way that a fetch and decoding takes an instruction cy-
cle while execution take the next instruction cycle. How-
ever, the pipelining scheme causes each instruction to
effectively execute in a cycle. If an instruction changes
the program counter, two cycles are required to com-
plete the instruction.
Program Counter
PC
Theprogramcountercontrolsthesequenceinwhichthe
instructions stored in the program memory are executed
and its contents specify full range of program memory.
After accessing a program memory word to fetch an in-
struction code, the contents of the program counter are
incrementedbyone.Theprogramcounterthenpointsto
the memory word containing the next instruction code.
When executing a jump instruction, conditional skip ex-
ecution, loading PCL(program counter lower-order byte
register), subroutine call, initial reset, interrupts or return
from subroutine or interrupts, the program counter ma-
nipulates the program transfer by loading the address
corresponding to each instruction.
The conditional skip is activated by instructions. Once
the condition is met, the next instruction, fetched during
the current instruction execution, is discarded and a
dummy cycle replaces it to get the proper instruction.
Otherwise proceed with the next instruction.
The lower-order byte of the program counter (PCL) can
be accessed by using software instructions. Moving
da
ta into the PCL performs a short jump. The destina-
tion will be within the current program ROM page.
Once the control transfer takes place, the execution suf-
fers from having an additional dummy cycle.
Program Memory
PROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into