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參數(shù)資料
| 型號(hào)： | HS1-82C55ARH-8 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | Radiation Hardened CMOS Programmable Peripheral Interface |
| 中文描述： | 24 I/O, PIA-GENERAL PURPOSE, CDIP40 |
| 文件頁(yè)數(shù)： | 9/23頁(yè) |
| 文件大?。?/td> | 165K |
| 代理商： | HS1-82C55ARH-8 |
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Waveforms
FIGURE 1. MODE 0 (BASIC INPUT)
FIGURE 2. MODE 0 (BASIC OUTPUT)
FIGURE 3. MODE 1 (STROBED INPUT)
FIGURE 4. MODE 1 (STROBED OUTPUT)
FIGURE 5. MODE 2 (BIDIRECTIONAL)
NOTE: Any sequence whereWR occurs beforeACK andSTB occurs
before RD is permissible.
FIGURE 6. WRITE TIMING
FIGURE 7. READ TIMING
RD
INPUT
CS, A1, A0
D7 - D0
TPVRL
TRHPX
TRLRH
TAVRL
TRHAX
TRLDV
TRHDZ
WR
D7 - D0
CS, A1, A0
OUTPUT
TWLWH
TDVWH
TWHDX
TAVWL
TWHPV
TWHAX
STB
IBF
INTR
RD
INPUT FROM
PERIPHERAL
TSLSH
TSLIH
TSHPX
TPVSH
TRHIL
TRLNL
TSHNH
WR
OBF
INTR
ACK
OUTPUT
TWLNL
TWHOL
TKLOH
TWHPV
TKLKH
TKHNH
WR
OBF
INTR
ACK
STB
IBF
PERIPHERAL
BUS
RD
DATA FROM PERI-
PHERAL TO
HS-82C55ARH
DATA FROM CPU
TO HS-82C55ARH
TWHOL
TSLIH
TKLOH
TKLKH
DATA FROM
HS-82C55ARH
TO PERIPHERAL
DATA FROM
HS-82C55ARH
TO CPU
TSLSH
TKLPV
TPVSH
TKHPX
TSHPX
TRHIL
A0 - A1, CS
DATA BUS
WR
TAVWL
TWHAX
TWLWH
TWHDX
TDVWH
A0 - A1, CS
RD
DATA BUS
TAVRL
TRHAX
HIGH IMPEDANCE
VALID
HIGH IMPEDANCE
TRLRH
TAVRL
TRHDX
HS-82C55ARH
Spec Number
518060
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HS1-82C55ARH-Q | 制造商:Intersil Corporation 功能描述:PERIPHERAL INTRFC 40CDIP - Rail/Tube |
| HS1-82C59ARH-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Interrupt Controller |
| HS1-82C85RH | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened CMOS Static Clock Controller/Generator |
| HS1-82C85RH-8 | 制造商:Intersil Corporation 功能描述:CLOCK CNTRLR/GENERATOR 24PIN SBDIP - Rail/Tube |
| HS1-82C85RH-Q | 制造商:Intersil Corporation 功能描述:CLOCK CNTRLR/GENERATOR 24PIN SBDIP - Rail/Tube |
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