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參數(shù)資料
| 型號(hào)： | HS1-81C55RH-Q |
| 廠商： | INTERSIL CORP |
| 元件分類： | DRAM |
| 英文描述： | Radiation Hardened 256 x 8 CMOS RAM |
| 中文描述： | 256 X 8 MULTI-PORT SRAM, CDIP40 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-40 |
| 文件頁(yè)數(shù)： | 6/11頁(yè) |
| 文件大?。?/td> | 122K |
| 代理商： | HS1-81C55RH-Q |
6
Functional Description
The HS-81C55RH and 81C56RH contains the following:
2K Bit Static RAM Organized as 256 x 8
Two 8-Bit I/O Ports (PA and PB) and One 6-Bit I/O Port
(PC)
14-Bit Timer-Counter
The IO/M (IO/Memory Select) pin selects either the five
register (Command, Status, PA0 - PA7, PB0 - PB7, PC0 -
PC5) or the memory (RAM) portion.
The 8-bit address on the Address/Data lines, Chip Enable
input CE or CE and IO/M are all latched on-chip at the falling
edge of ALE.
Waveforms
(Continued)
RD
INPUT
DATA BUS
tPR
tRP
BASIC INPUT
BASIC INPUT
RD
INPUT
DATA BUS
tWP
RELOAD COUNTER CLR
LOAD COUNTER CLR
TIMER OUTPUT COUNTDOWN FROM 5 TO 1
2
1
tF
5
4
3
2
1
5
TIMER IN
TIMER OUT
(PULSE)
TIMER OUT
(SQUARE WAVE)
(NOTE 1)
(NOTE 1)
tR
t2
t1
tCYC
tTL
tTH
tTH
tTL
NOTE: THE TIMER OUTPUT IS PERIODIC IF IN AN AUTOMATIC
RELOAD MODE (M, MODE BIT = 1)
COMMAND
STATUS
PC
PB
PA
TIMER
MSB
TIMER
LSB
8-BIT INTERNAL DATA BUS
6
8
8
TIMER MODE
FIGURE 1. INTERNAL REGISTERS
HS-81C55RH, HS-81C56RH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HS1-81C56RH-8 | Radiation Hardened 256 x 8 CMOS RAM |
| HS1-81C56RH-Q | Radiation Hardened 256 x 8 CMOS RAM |
| HS1100 | RELATIVE HUMIDITY SENSOR |
| HS1101 | RELATIVE HUMIDITY SENSOR |
| HS13 | HIGH EFFICIENCY RECTIFIERS(1.0A,50-400V) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HS1-81C56RH | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 256 x 8 CMOS RAM |
| HS1-81C56RH-8 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 256 x 8 CMOS RAM |
| HS1-81C56RH-Q | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 256 x 8 CMOS RAM |
| HS1820A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
| HS1820B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
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