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參數(shù)資料
| 型號： | HS-565ARH-T |
| 廠商： | Intersil Corporation |
| 英文描述： | Radiation Hardened High Speed, Monolithic Digital-to-Analog Converter(抗輻射高速數(shù)模轉(zhuǎn)換器) |
| 中文描述： | 輻射硬化高速，單片數(shù)字模擬轉(zhuǎn)換器（抗輻射高速數(shù)模轉(zhuǎn)換器） |
| 文件頁數(shù)： | 5/6頁 |
| 文件大?。?/td> | 108K |
| 代理商： | HS-565ARH-T |
5
Other Considerations
Grounds
The HS-565ARH-T has two ground terminals, pin 5 (REF
GND) and pin 12 (PWR GND). These should not be tied
together near the package unless that point is also the
system signal ground to which all returns are connected. (If
such a point exists, then separate paths are required to pins
5 and 12).
The current through pin 5 is near zero DC (Note); but pin 12
carries up to 1.75mA of code - dependent current from bits
1, 2, and 3. The general rule is to connect pin 5 directly to
the system “quiet” point, usually called signal or analog
ground. Connect pin 12 to the local digital or power ground.
Then, of course, a single path must connect the
analog/signal and digital/power grounds.
NOTE:
565ARH-T in which code dependent variations are eliminated, the re-
sulting DC current is supplied internally. First an auxiliary 9-bit R-2R
ladder is driven by the complement of the DACs input code. Together,
Current cancellation is a two step process within the HS-
the main and auxiliary ladders draw a continuous 2.25mA from the
internalgroundnode,regardlessofinputcode.PartoftheDCcurrent
is supplied by the zener voltage reference, and the remainder is
sourced from the positive supply via a current mirror which is laser
trimmed for zero current through the external terminal (pin 5).
Layout
Connections to pin 9 (I
OUT
) on the HS-565ARH-T are most
critical for high speed performance. Output capacitance of
the DAC is only 20pF, so a small change of additional
capacitance may alter the op amp’s stability and affect
settling time. Connections to pin 9 should be short and few.
Component leads should be short on the side connecting to
pin 9 (as for feedback capacitor C). See the Settling Time
Section.
Bypass Capacitors
Power supply bypass capacitors on the op amp will serve the
HS-565ARH-T also. If no op amp is used, a 0.01mF ceramic
capacitor from each supply terminal to pin 12 is sufficient,
since supply current variations are small.
Bipolar (See Figure 2)
±
10V
NC
VO
1.69K
All 0’s
All 1’s
All 0’s
All 1’s
All 0’s
All 1’s
R3
R4
R3
R4
R3
R4
-10V
+9.99512V
-5V
+4.99756V
-2.5V
+2.49878V
±
5V
VO
Pin 10
1.43K
±
2.5V
VO
Pin 9
1.1K
FIGURE 3A.
FIGURE 3B.
TABLE 1. OPERATING MODES AND CALIBRATION (Continued)
MODE
CIRCUIT CONNECTIONS
PIN 10
TO
CALIBRATION
OUTPUT
RANGE
PIN 11
TO
RESISTOR
(R)
APPLY
INPUT CODE
ADJUST
TO SET VO
VLSB
SUPPLY
0.1
μ
F
DVM
COMPARATOR
OUT
B
C
10
90
200K
+
-
5
9
10NC
11
8
2.5K
5K
5K
20V
±
20%
BIAS
TURN ON
TURN OFF
9.95K
2mA
12
HS-565ARH-T
D
OUT
14
13
23
.
.
.
.
.
.
.
.
.
.
.
.
.
24
5V
P
SYNC
IN
TRIG
OUT
OUT
A
~100
kHz
STROBE IN
LSB
PULSE
GENERATOR
NO. 2
PULSE
GENERATOR
NO. 2
50%
DIGITAL
INPUT
DAC
OUTPUT
COMP.
STROBE
COMP.
OUT
“EQUAL BRIGHTNESS”
+3V
0V
0V
-400mV
(TURN OFF)
2V
0.8V
4V
0V
A
B
C
D
50%
t
X
tD = COMPARATOR DELAY
SETTLING TIME
-0.50LSB
HS-565ARH-T
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