參數(shù)資料
型號(hào)： HMP8191
廠商： Intersil Corporation
英文描述： NTSC/PAL Video Encoder
中文描述： NTSC / PAL視頻編碼器
文件頁(yè)數(shù)： 17/32頁(yè)
文件大?。?/td> 227K
代理商： HMP8191
17
1
WSS
Line 283
Write Status
0 = WSS_283A and WSS_283B data registers contain unused data
1 = Data has been output, host processor may now write to the registers
1
B
0
Reserved
0
B
TABLE 20. HOST CONTROL REGISTER 1 (Continued)
SUB ADDRESS = 0E
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
TABLE 21. HOST CONTROL REGISTER 2
SUB ADDRESS = 0F
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7
Software Reset
Setting this bit to “1” initiates a software reset. It is automatically reset to a “0” after the reset
sequence is complete.
0
B
6
General
Power Down
This bit powers down all DAC outputs and most of the digital circuitry.
0 = Normal operation
1 = Power down mode
0
B
5
Power Down
NTSC/PAL 1
Output DAC
This bit powers down only the NTSC/PAL 1 DAC output.
0 = Normal operation
1 = Power down mode
0
B
4
Reserved
0
B
3
Power Down
Y Output DAC
This bit powers down only the Y DAC output.
0 = Normal operation
1 = Power down mode
0
B
2
Power Down
C Output DAC
This bit powers down only the C DAC output.
0 = Normal operation
1 = Power down mode
0
B
1-0
Reserved
00
B
TABLE 22. CLOSED CAPTION_21A DATA REGISTER
SUB ADDRESS = 10
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 21 Caption
LSB Data
This register is cascaded with the closed caption_21B data register and they are read out se-
rially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A data
register is shifted out first.
80
H
TABLE 23. CLOSED CAPTION_21B DATA REGISTER
SUB ADDRESS = 11
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Line 21 Caption
MSB Data
This register is cascaded with the closed caption_21A data register and they are read out se-
rially as 16 bits during line 18, 21, or 22 if line 21 captioning is enabled. Bit D0 of the 21A data
register is shifted out first.
80
H
HMP8190, HMP8191
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