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參數(shù)資料
| 型號(hào)： | HMP8191 |
| 廠商： | Intersil Corporation |
| 英文描述： | NTSC/PAL Video Encoder |
| 中文描述： | NTSC / PAL視頻編碼器 |
| 文件頁(yè)數(shù)： | 13/32頁(yè) |
| 文件大?。?/td> | 227K |
| 代理商： | HMP8191 |
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TABLE 11. CONTROL REGISTER NAMES
SUB ADDRESS
(HEX)
CONTROL REGISTER
RESET
CONDITION
00
01
02
03
04
05
06
07
08-0D
0E
0F
10
11
12
13
14
15
16
17
18
19
1A-1F
20
21
22
23
24
25
26
27
28-2F
30-6A
6B-6F
70-7F
product ID
output format
input format
video processing
timing I/O 1
timing I/O 2
VBI data enable
VBI data input
reserved
host control 1
host control 2
caption_21A
caption_21B
caption_284A
caption_284B
WSS_20A
WSS_20B
WSS_283A
WSS_283B
CRC_20
CRC_283
reserved
start h_blank low
start h_blank high
end h_blank
start v_blank low
start v_blank high
end v_blank
field control 1
field control 2
reserved
test and unused
phase increment
test and unused
-
00
H
06
H
80
H
00
H
00
H
00
H
00
H
-
1E
H
00
H
80
H
80
H
80
H
80
H
00
H
00
H
00
H
00
H
3F
H
3F
H
-
4A
H
03
H
7A
H
03
H
01
H
13
H
00
H
00
H
-
-
-
-
FIGURE 10. I
2
C SERIAL TIMING FLOW
FIGURE 11. REGISTER WRITE PROGRAMMING FLOW
SDA
SCL
START
CONDITION
S
1-7
ADDRESS
8
R/W
9
ACK
1-7
DATA
8
9
ACK
STOP
CONDITION
P
A
A
S
CHIP ADDR
SUB ADDR
DATA
DATA
A
A
P
S = START CYCLE
P = STOP CYCLE
A = ACKNOWLEDGE
NA = NO ACKNOWLEDGE
FROM MASTER
FROM ENCODER
0x40 OR
0x42
DATA WRITE
DATA
DATA
DATA READ
REGISTER
POINTED
TO BY
SUBADDR
REGISTER
POINTED
TO BY
SUBADDR
0x41 OR
0x43
P
NA
A
A
CHIP ADDR
S
A
SUB ADDR
A
CHIP ADDR
S
OPTIONAL FRAME
MAY BE REPEATED
n TIMES
OPTIONAL FRAME
MAY BE REPEATED
n TIMES
0x40 OR
0x42
HMP8190, HMP8191
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HMP8191CN | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NTSC/PAL Video Encoder |
| HMP8201CN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Compression/Expansion Circuit |
| HMP820SGR32GM | 制造商:Advanced Micro Devices 功能描述:PHENOM II MOBILE X3 P820 25W S1G4 - Trays |
| HMP9701 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:AC’97 Audio Codec |
| HMP9701A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:AC’97 Audio Codec |
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