參數(shù)資料
型號(hào): HMP8156A
廠商: Intersil Corporation
英文描述: NTSC/PAL Encoders
中文描述: 的NTSC / PAL編碼器
文件頁(yè)數(shù): 22/34頁(yè)
文件大?。?/td> 256K
代理商: HMP8156A
22
TABLE 25. END H_BLANK REGISTER
SUB ADDRESS = 22
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Negate BLANK
Output Signal
(Horizontal)
This 8-bit register specifies the horizontal count (in 1X clock cycles) at which to start inputting
pixel data each scan line. The leading edge of HSYNC is count 000
H
. This register is ignored
unless BLANK is configured as an output.
7A
H
TABLE 26. START V_BLANK LOW REGISTER
SUB ADDRESS = 23
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Assert BLANK
Output Signal
(Vertical)
This 8-bit register is cascaded with Start V_Blank High Register to form a 9-bit
start_vertical_blank register. During normal operation, it specifies the line number (n) to start
ignoring pixel input data (and what line number to start blanking the output video) each odd
field; for even fields, it occurs on line (n + 262) or (n + 313).
During SIF input mode, the register value (n) specifies the line number to start ignoring pixel
input data each noninterlaced input frame. The output video will be blanked starting on line
number (n) each odd field; for even fields, it occurs on line (n + 262) or (n + 313).
The leading edge of VSYNC at the start of an odd field is count 000
H
(note that this does not
follow standard NTSC or PAL line numbering). This register is ignored unless BLANK is con-
figured as an output.
03
H
TABLE 27. START V_BLANK HIGH REGISTER
SUB ADDRESS = 24
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-1
Reserved
0000000
B
0
Assert BLANK
Output Signal
(Vertical)
This 1-bit register is cascaded with Start V_Blank Low Register to form a 9-bit
start_vertical_blank register. This register is ignored unless BLANK is configured as an output.
1
B
TABLE 28. END V_BLANK REGISTER
SUB ADDRESS = 25
H
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7-0
Negate BLANK
Output Signal
(Vertical)
During normal operation, this 8-bit register specifies the line number (n) to start inputting pixel
input data (and what line number to start generating active output video) each odd field; for
even fields, it occurs on line (n + 262) or (n + 313).
During SIF input mode, the register value (n) specifies the line number to start inputting pixel
input data each noninterlaced input frame. The output video will be active starting on line num-
ber (n) each odd field; for even fields, it occurs on line (n + 262) or (n + 313).
The leading edge of VSYNC at the start of an odd field is count 000
H
(note that this does not
follow standard NTSC or PAL line numbering). This register is ignored unless BLANK is con-
figured as an output.
13
H
HMP8154, HMP8156A
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PDF描述
HMP8154EVAL1 NTSC/PAL Encoders
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HMP8156ACN 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 64MQFP,0+70C NTSC/PAL VIDEO ENCODER RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線(xiàn)路數(shù)量(輸入/輸出):2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
HMP8156ACNZ 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 W/ANNEAL 64MQFP 0+70 ENCODER RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線(xiàn)路數(shù)量(輸入/輸出):2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
HMP8156CN 制造商:Rochester Electronics LLC 功能描述:- Bulk
HMP8156EVAL1 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:NTSC/PAL Encoders
HMP8156EVAL2 制造商:Rochester Electronics LLC 功能描述:- Bulk