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參數(shù)資料
| 型號： | HM658512AI |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4 M PSRAM (512-kword ×8-bit)(4 M PSRAM (512k字 ×8位)) |
| 中文描述： | 4個M移動存儲芯片（512 KWord的× 8位）（4個M移動存儲芯片（為512k字× 8位）） |
| 文件頁數(shù)： | 3/18頁 |
| 文件大?。?/td> | 129K |
| 代理商： | HM658512AI |
HM658512AI Series
3
Block Diagram
Refresh
control
Timing pulse generator
Read write control
Address latch control
Column decoder
Column I/O
Memory matrix
(2048
×
256)
×
8
Row
decoder
Address
latch
control
Input
data
control
CE
WE
I/O 7
I/O 0
A0
A10
A11
A18
OE
/
RFSH
Pin Functions
CE
(Input) :
CE
is a basic clock. RAM is active when
CE
is low, and is on standby when
CE
is high.
A0 to A18 (Input):
A0 to A10 are row addresses and A11 to A18 are column addresses. The entire
addresses A0 to A18 are fetched into RAM by the falling edge of
CE
.
OE
/
RFSH
(Input) :
This pin has two functions. Basically it works as
OE
when
CE
is low, and as
RFSH
when
CE
is high (in standby mode). After a read or write cycle finishes, refresh does not start if
CE
goes
high while
OE
/
RFSH
is held low. In order to start a refresh in standby mode,
OE
/
RFSH
must go high to
reset the refresh circuits of the RAM. After the refresh circuits are reset, the refresh starts when
OE
/
RFSH
goes low.
I/O0 to I/O7 (Inputs and Outputs) :
These pins are data I/O pins.
WE
(Input):
RAM is in write mode when
WE
is low, and is in read mode when
WE
is high. I/O data is
fetched into RAM by the rising edge of
WE
or
CE
(earlier timing) and the data is written into memory
cells.
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| HM658512ALFP-10 | 4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALFP-10V | JT 128C 128#22D PIN PLUG |
| HM658512ALRR-10 | 4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALTT-10 | 4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALTT-10V | 4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM658512ALFP-10 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALFP-10V | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALFP-7 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALFP-7V | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
| HM658512ALFP-8 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4 M PSRAM (512-kword x 8-bit) 2 k Refresh |
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