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參數(shù)資料
| 型號(hào)： | HM62W8512BI |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4 M SRAM (512-kword×8-bit)(4 M 靜態(tài)RAM(512k字×8位)) |
| 中文描述： | 四米的SRAM（512 - KWord的× 8位）（4個(gè)M靜態(tài)隨機(jī)存儲(chǔ)器（為512k字× 8位）） |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大?。?/td> | 59K |
| 代理商： | HM62W8512BI |
HM62W8512BI Series
9
Write Timing Waveform (2) (OE Low Fixed)
Low V
CC
Data Retention Characteristics (Ta =
–40 to +85
°
C)
Notes:
1.For L-version and 10
μ
A (max.) at Ta = –40 to +40
°
C.
2.CS controls address buffer, WE buffer, OE buffer, and Din buffer. In data retention mode, Vin
levels (address, WE, OE, I/O) can be in the high impedance state.
3.Typical values are at V
CC
= 3.0 V, Ta = +25
°
C and specified loading, and not guaranteed.
4.t
RC
= read cycle time.
Parameter
V
CC
for data retention
Data retention current
Symbol
V
DR
I
CCDR
Min
2
—
Typ
—
0.8*
3
Max
—
20*
1
Unit
V
μ
A
Test conditions*
2
CS
≥
V
CC
– 0.2 V, Vin
≥
0 V
V
CC
= 3.0 V, Vin
≥
0 V
CS
≥
V
CC
– 0.2 V
See retention waveform
Chip deselect to data retention time t
CDR
Operation recovery time
0
t
RC
*
4
—
—
—
—
ns
ns
t
R
Address
CS
WE
Dout
Din
t
WC
t
CW
t
WR
t
AW
t
WP
t
AS
t
WHZ
t
OW
t
OH
t
DW
t
DH
*11
*9
*10
*8
Valid Data
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM62W8512BLTT-7UL | Octal Buffer/Driver With Open-Collector Outputs 20-PDIP -40 to 85 |
| HM62W8512BLFP-5 | 4 M SRAM (512-kword x 8-bit) |
| HM62W8512BLFP-5SL | 4 M SRAM (512-kword x 8-bit) |
| HM62W8512BLFP-5UL | 4 M SRAM (512-kword x 8-bit) |
| HM62W8512BLFP-7 | 4 M SRAM (512-kword x 8-bit) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM62W8512BLFP-5 | 制造商:HITACHI 功能描述: |
| HM62W8512BLTTI7 | 制造商:Hitachi 功能描述: |
| HM-630 | 制造商:Black Box Corporation 功能描述:FACE PLATE:HM-STAINLESS |
| HM63021FP | 制造商:Panasonic Industrial Company 功能描述:IC |
| HM63021P-28 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field/Frame/Line Memory |
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