參數(shù)資料
型號(hào): HM62W8512BI
廠商: Hitachi,Ltd.
英文描述: 4 M SRAM (512-kword×8-bit)(4 M 靜態(tài)RAM(512k字×8位))
中文描述: 四米的SRAM(512 - KWord的× 8位)(4個(gè)M靜態(tài)隨機(jī)存儲(chǔ)器(為512k字× 8位))
文件頁(yè)數(shù): 6/12頁(yè)
文件大?。?/td> 59K
代理商: HM62W8512BI
HM62W8512BI Series
6
Read Cycle
Write Cycle
Notes:
1.t
HZ
, t
OHZ
and t
WHZ
are defined as the time at which the outputs achieve the open
circuit\~conditions and are not referred to output voltage levels.
2.This parameter is sampled and not 100% tested.
HM62W8512BI
-7
Min
70
10
5
0
0
10
-8
Min
85
10
5
0
0
10
Parameter
Read cycle time
Address access time
Chip select access time
Output enable to output valid
Chip selection to output in low-Z
Output enable to output in low-Z
Chip deselection to output in high-Z
Output disable to output in high-Z
Output hold from address change
Symbol
t
RC
t
AA
t
CO
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
Max
70
70
35
30
30
Max
85
85
45
35
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2
2
1, 2
1, 2
HM62W8512BI
-7
Min
70
60
0
60
50
0
0
30
0
5
0
-8
Min
85
75
0
75
55
0
0
35
0
5
0
Parameter
Write cycle time
Chip selection to end of write
Address setup time
Address valid to end of write
Write pulse width
Write recovery time
WE to output in high-Z
Data to write time overlap
Data hold from write time
Output active from output in high-Z
Output disable to output in high-Z
Symbol
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
t
OHZ
Max
30
30
Max
35
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
4
5
3, 12
6
1, 2, 7
2
1, 2, 7
Dout
500
1.4 V
50 pF
相關(guān)PDF資料
PDF描述
HM62W8512BLTT-7UL Octal Buffer/Driver With Open-Collector Outputs 20-PDIP -40 to 85
HM62W8512BLFP-5 4 M SRAM (512-kword x 8-bit)
HM62W8512BLFP-5SL 4 M SRAM (512-kword x 8-bit)
HM62W8512BLFP-5UL 4 M SRAM (512-kword x 8-bit)
HM62W8512BLFP-7 4 M SRAM (512-kword x 8-bit)
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