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參數(shù)資料
| 型號： | HIP7030A2P |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | FPGA - 200000 SYSTEM GATE 2.5 VOLT - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PDIP28 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大小： | 44K |
| 代理商： | HIP7030A2P |
9-40
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
407-727-9207
|
Copyright
Intersil Corporation 1999
HIP7030A0
J1850 8-Bit 68HC05 Microcontroller
Emulator Version
Description
The HIP7030A0 Emulator is functionally equivalent to the
HIP7030A2 microcontroller with the addition of external data
bus, address bus, and control signals which provide off chip
address capability. It is designed to permit prototype and
pre-production development of systems for mask pro-
grammed applications. The HIP7030A0 is also intended for
construction of development systems for the HIP7030A2.
Ordering Information
PART NUMBER
TEMPERATURE
RANGE
PACKAGE
HIP7030A0M
-40
o
C to +125
o
C
68 Lead Plastic LCC
Features
HIP7030A2 Microcontroller Emulation
- All HIP7030A2 Hardware and Software Features
- Timing and Performance Equivalent to HIP7030A2
On-Chip Memory
- 176 Bytes of RAM - No ROM
Full 8K Byte Address Space Available Externally
Non-Multiplexed External Address and Data Lines
- I/O Memory Interface Matches Industry Standard
EPROM/EEPROMS for True Emulation with Two
Chips
FS Line Identifies Fetch Cycles for Breakpoint Logic
-40
o
C to +125
o
C Operating Range
Single 3.0V to 6.0V Supply
Available in 68 Lead PLCC Packages
File Number
3645
PRELIMINARY
April 1994
Pinout
HIP7030A0 (PLCC)
TOP VIEW
6867666564636261
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
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36
35
34
18
19
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22
23
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25
26
27282930313233
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
NC
NC
C
WE
DS
ALC
PD4
PD3
PD2
PD1
PD0
NC
NC
V
OSCOUT
OSCIN
SCK
MOSI
F
R
A
A
A
A
A
A
A
A
A
A
A
A
A12
NC
N
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
OSCB
PA0
PA1
PA2
PA3
PA4
PA5
N
N
N
N
N
M
S
T
T
V
V
R
I
V
D
N
P
P
N
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