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參數(shù)資料
| 型號： | HIP5020DB |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 4 A SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PDSO28 |
| 文件頁數(shù)： | 14/15頁 |
| 文件大?。?/td> | 128K |
| 代理商： | HIP5020DB |
2-26
The r
DS(ON)
can be estimated at a given input voltage and
junction temperature as follows:
1. Assume that the gate voltage is equal to V
CC
. Find the
gate voltage at 25
o
C from Figure 10.
2. Multiply this number by the r
DS(ON)
shown in Figure 15.
Interpolate as necessary.
Application Hints
Short Duration RUN Interval
Some converter designs may observe a series of short run
interval pulses (RUN = High) in hysteretic mode that can
reduce the light-load efficiency. The run interval is
interrupted by the voltage on the FB pin crossing over the
Upper Hysteretic Trip Level before the output capacitor gains
sufficient charge. This operation can be caused by a number
of factors:
1. Poor physical layout. Use wide traces to connect the pow-
er components.
2. Poor component choice. Use only power supply specific
electrolytic capacitors. Additionally use ceramic capaci-
tors in parallel with the bulk electrolytic capacitors.
3. Sudden voltage excursions across the output capacitor
and the error amplifier output.
Be sure to clear up any layout problems first. Poor layout not
only causes efficiency problems, but can be a source of
noise for surrounding circuits. If the short run interval is still
observed, a capacitor can be added across each R2 and R4.
During the transition of RUN from low to high, the voltage on
the FB pin starts at the Lower Hysteretic Trip Level. The error
amplifier activates and its output slews to V
HMI
. This causes
an increase in V
FB
due to current in the compensation
capacitor. Adding a capacitor across R4 slows the rate of HMI
voltage increase during the transition of RUN from low to high
and decreases error amplifier slew rate.
Voltage excursions across the output capacitor and circuit
board traces after the transition of RUN from low to high
results in an increase in V
FB
. As the inductor current ramps to
the HMI level, the output voltage increases due to the output
capacitor’s ESR and ESL. This voltage spike is attenuated by
the resistor divider, R1 and R2 but still appears on the FB pin.
A small capacitor across R2 further attenuates any output
voltage spikes. The small capacitor eliminates the short
duration RUN interval, but will not reduce the output voltage
spikes. A better solution may be a better, higher quality output
capacitor with low ESR and ESL.
Bootstrap and Phase Diodes
The bootstrap function requires a diode D1 to supply gate
drive power for the upper N-Channel MOSFET. A Schottky is
recommended for most applications due to its fast switching
speed and low forward voltage. A fast-recovery diode can be
used in low switching frequency, cost sensitive applications.
Many applications will not need a Schottky diode from phase
to ground. The internal body diode of the integrated
MOSFET is sufficiently fast. A small Schottky diode can be
added to improve the light load efficiency. This diode only
conducts during the short intervals (< 50ns) before and after
the lower MOSFET conducts. In most cases, a Schottky
rated for 0.5A is sufficient.
2
4
6
8
10
12
14
16
18
20
0.05
0.06
0.07
0.08
0.09
0.10
INPUT VOLTAGE
r
D
)
FIGURE 14. r
DS(ON)
vs INPUT VOLTAGE
T
J
= 25
o
C
FIGURE 15. r
DS(ON)
vs JUNCTION TEMPERATURE
TEMPERATURE (
o
C)
r
D
)
40
60
100
120
130
140
120
70
0
20
80
60
110
100
90
80
V
G-S
= 12V
V
G-S
= 18V
V
G-S
= 8V
HIP5020
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HIP5020DB WAF | 制造商:Harris Corporation 功能描述: 制造商:Intersil Corporation 功能描述: |
| HIP5020EVAL2 | 制造商:Harris Corporation 功能描述: |
| HIP5060 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Power Control IC Single Chip PowerSupply |
| HIP5060D WAF | 制造商:Harris Corporation 功能描述: |
| HIP5060DW | 制造商:Harris Corporation 功能描述: |
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