參數(shù)資料
型號(hào)： HIP5020DB
廠商： HARRIS SEMICONDUCTOR
元件分類： 穩(wěn)壓器
英文描述： FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN
中文描述： 4 A SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PDSO28
文件頁(yè)數(shù)： 12/15頁(yè)
文件大?。?/td> 128K
代理商： HIP5020DB
2-24
a higher ripple voltage for load current between 0.2A and
0.6A. If the load is sensitive to power supply ripple during this
load range, the lower efficiency HMI setting should be used.
The voltage on the HMI pin is used to clamp the lower limit of
error amplifier output voltage and the minimum peak
inductor current. This voltage is set by a 20
μ
A current source
and the resistor, R4.
Soft-Start
Set the Soft-Start capacitor, C8 so that the output voltage
ramps to its final value with a current between the hysteretic
mode current and the rated current. The minimum value for
C8 can be determined from:
Larger values for C8 will extend the soft-start interval, T
SOFT
.
Any loading during the Start-up mode lengthens T
SOFT
.
Bypass and Filter Capacitors
Capacitor C12 supplies the leading edge PWM current each
switching cycle. A high quality (X7R dielectric ceramic)
0.1
μ
F surface-mount capacitor is recommended. Locate
C12 directly across the VIN and PGND pins.
Bypass the internal V
CC
supply with a high quality (X7R
dielectric ceramic) surface-mount capacitor (C4). Locate C4
directly across the VCC and GND pins.
The value for capacitor C5 should be selected as described in
the Charge Pump Regulator above. A single high quality (X7R
dielectric ceramic) capacitor is usually adequate. Some
applications may need a high capacitance, electrolytic for
charge-pump operation. For these applications, a high quality
capacitor in parallel with the electrolytic is recommended.
Locate C5 directly across the CP+ and CP- pins.
R5 and C10 form a low-pass filter for the bias supply (V
INF
) of
the reference and hysteretic comparator functions. A 2k
resistor for R5 and a 0.1
μ
F Capacitor for C10 is recommended.
Locate C10 directly across the VINF and GND pins.
Thermal Design
The power ground (PGND) pins of the SOIC package
provide a thermal conduction path for removing heat from
the HIP5020. Inside the package, the HIP5020 die is
mounted on a copper structure with connections to PGND
(pins 6, 7, 8, 9, 20, 21, 22, and 23). Solder the SOIC to a
circuit board with a copper ground plane to remove heat
from the package. With good component layout and 3
square inches of copper ground plane, the junction-to-
ambient thermal resistance is 36
o
C/W. Most of the
converter’s power dissipation will be in the HIP5020 and the
output inductor, L1. The power dissipated in the HIP5020
can be estimated from the converter’s full load efficiency and
subtracting the inductor’s power dissipation (
junction temperature rise above ambient is this power
multiplied by the thermal resistance. Use the HIP5020
design and simulation software for more accurate thermal
simulations. Be sure to keep the junction temperature below
125
o
C for reliable operation. Careful component layout and
good thermal design maximized the efficiency and reliability
of the converter.
). The
Detailed Characteristics
Charge Pump Regulator
The charge pump regulator supplies control power (V
CC
) to
the internal functions of the HIP5020. The charge pump
operates for input voltage levels below 9.8V and is disabled
for input voltages above 9.8V. Figure 10 shows the charge
pump output voltage (V
CC
) as a function of the input voltage
(V
IN
). For input voltages below 9.8V nominally, the charge
pump operates in two regions - as a voltage doubler and as
a voltage regulator. The charge pump operates as a normal
voltage doubler when V
CC
is below approximately 14.8V.
The charge pump limits V
CC
to approximately 14.8V in the
regulation region. For input voltages above 9.8V, the charge
pump is disabled and V
CC
follows the input voltage less a
diode drop.
0.01
0.1
1
10
80
85
90
95
100
LOAD CURRENT (A)
E
0.001
V
HMI
= 0.5V
V
HMI
= 0.15V
FIGURE 9. EFFICIENCY vs LOAD CURRENT
75
70
T
A
= 25
o
C
CIRCUIT 1: V
IN
= 6VDC
C8
MIN
T
SOFT
5
REF
–
--------------
=
where T
SOFT
C1
---------------------
V
O
=
I
O2
R
DC
HIP5020
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HIP5020DB WAF 制造商:Harris Corporation 功能描述: 制造商:Intersil Corporation 功能描述:
HIP5020EVAL2 制造商:Harris Corporation 功能描述:
HIP5060 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Power Control IC Single Chip PowerSupply
HIP5060D WAF 制造商:Harris Corporation 功能描述:
HIP5060DW 制造商:Harris Corporation 功能描述:
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