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參數(shù)資料
| 型號： | HHY5W2A6CLF-B |
| 英文描述： | x16 SDRAM |
| 中文描述： | x16內(nèi)存 |
| 文件頁數(shù)： | 17/24頁 |
| 文件大?。?/td> | 221K |
| 代理商： | HHY5W2A6CLF-B |
HY5W2A6C(L/S)F / HY57W2A1620HC(L/S)T
HY5W26CF / HY57W281620HCT
Rev. 1.2 / Nov. 01
18
DC CHARACTERISTICS
II
(TA= -25 to 85)
Note : 1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2. Min. of tRRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II.
3. See the tables of next page for more specific IDD6 current values.
- Normal Power :
HY5W2A6CF / HY57W2A1620CT Series
- Low Power :
HY5W2A6CLF / HY57W2A1620CLT Series
- Super Low Power :
HY5W2A6CSF / HY57W2A1620CST Series
- Standard Part : HY5W26CF / HY5W281620HCT Series
Parameter
Symbol
Test Condition
Speed
Unit
Note
-H
-P
-S
-B
Operating Current
I
DD1
Burst length=1, One bank active
t
RC
≥
t
RC
(min), I
OL
=0mA
75
65
60
60
mA
1
Precharge Standby Current
in Power Down Mode
I
DD2P
CKE
≤
V
IL
(max), t
CK
= 15ns
0.5
mA
I
DD2PS
CKE
≤
V
IL
(max), t
CK
=
∞
0.5
mA
Precharge Standby Current
in Non Power Down Mode
I
DD2N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CK
= 15ns
Input signals are changed one time during
2clks. All other pins
≥
V
DD
-0.2V or
≤
0.2V
7
mA
I
DD2NS
CKE
≥
V
IH
(min), t
CK
=
∞
Input signals are stable.
7
Active Standby Current
in Power Down Mode
I
DD3P
CKE
≤
V
IL
(max), t
CK
= 15ns
5
mA
I
DD3PS
CKE
≤
V
IL
(max), t
CK
=
∞
5
Active Standby Current
in Non Power Down Mode
I
DD3N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CK
= 15ns
Input signals are changed one time during
2clks. All other pins
≥
V
DD
-0.2V or
≤
0.2V
15
mA
I
DD3NS
CKE
≥
V
IH
(min), t
CK
=
∞
Input signals are stable.
15
Burst Mode Operating
Current
I
DD4
t
CK
≥
t
CK
(min), I
OL
=0mA
All banks active
100
80
70
70
mA
1
Auto Refresh Current
I
DD5
t
RRC
≥
t
RRC
(min), All banks active
165
155
125
125
mA
2
Self Refresh Current
I
DD6
CKE
≤
0.2V
mA
3
Standby Current in Deep
Power Down Mode
TBD
TBD
60
μ
A
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