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參數(shù)資料
| 型號(hào)： | HD74CDC587 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 3.3-V Phase-lock Loop Clock Driver with 3-state Outputs(3.3-V 鎖相環(huán)時(shí)鐘驅(qū)動(dòng)器) |
| 中文描述： | 3.3 - V相位鎖3環(huán)路時(shí)鐘驅(qū)動(dòng)器狀態(tài)輸出（3.3 V的鎖相環(huán)時(shí)鐘驅(qū)動(dòng)器） |
| 文件頁(yè)數(shù)： | 11/13頁(yè) |
| 文件大?。?/td> | 79K |
| 代理商： | HD74CDC587 |
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HD74CDC587
11
Test Circuit
(SSTL_3)
C = 30 pF
25
Measurement
point
From output
V
TT
*1
25
Note:
1.
C
L
includes probe and jig capacitance.
Waveforms
phase error
t
V
OH
V
OL
1.1 V
1.9 V
1.5 V
1.5 V
0.8 V
2 V
2 V
0.8 V
1.5 V
TLH
t
THL
t
CLK
FBIN
(=FBOUT)
Notes:
1.
All input pulses are supplied by generators having the following characteristics: PRR
≤
150
MHz, Z
O
= 50
, tr = 0.7 ns, tf = 0.7 ns.
The outputs are measured one at a time with one transition per measurement.
V
TT
= V
REF
= 1.5 V
2.
3.
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