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參數(shù)資料
| 型號(hào)： | HD66760 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 104 X 80-dot Graphics LCD Controller/Driver for 256 Colors |
| 中文描述： | 104 × 80點(diǎn)圖形LCD控制器/驅(qū)動(dòng)器的256色 |
| 文件頁(yè)數(shù)： | 44/105頁(yè) |
| 文件大?。?/td> | 653K |
| 代理商： | HD66760 |
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HD66760
44
a) Basic data-receive timing through the I
2
C bus interface
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
SCL
(input)
SDA
(input/
output)
"0" "1" "1" "1" "0"
"0"
ID
RS
Ack D7 D6 D5 D4 D3 D2 D1 D0 Ack D7 D6 D5 D4 D3 D2 D1 D0 Ack
Transfer start
Transfer end
RS RW
Device ID code
1st index or data
2nd index or data
Acknowledge
Acknowledge
Start byte
Index register / write data register
Acknowledge
b) 1st and 2nd byte assignment
D7
D6
D5
D4
D3
D2
D1
D0
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
D7
D6
D5
D4
D3
D2
D1
D0
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
1st byte
Index / write data register
upper bits
2nd byte
Index / write data register
lower bits
c) Consecutive data-receive timing through the I
2
C bus interface
1 2 3 4 5 6 7 8 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
SCL
SDA
Transfer start
Transfer end
2 bytes
28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45
Start byte
Index / write data
register upper bits
Index / write data
register lower bits
Index / write data
register upper bits
Index / write data
register lower bits
A
A
A
A
A
P
S
2 bytes
Index / write data register execution.
Index / write data
register execution.
note:
- After start byte transfer, upper bits of the index or write data register should be written first.
- Start byte should be transfered just after start (S).
- Index or write data register is executed when upper and lower bits are written.
Therefore, data transfer unit has to be twice byte access cycle.
Figure 29 I
2
C bus interface data-receive sequence
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