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參數(shù)資料
| 型號(hào)： | HD66760 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 104 X 80-dot Graphics LCD Controller/Driver for 256 Colors |
| 中文描述： | 104 × 80點(diǎn)圖形LCD控制器/驅(qū)動(dòng)器的256色 |
| 文件頁(yè)數(shù)： | 32/105頁(yè) |
| 文件大?。?/td> | 653K |
| 代理商： | HD66760 |
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HD66760
32
RAM Write Data Mask (R20h)
WM15–0:
In writing to the GRAM, these bits mask writing in a bit unit. When WM15 = 1, this bit masks the
write data of DB15 and does not write to the GRAM. Similarly, the WM14-0 bits mask the write data of
DB14-0 in a bit unit. When SWP = 1, the upper and lower bytes in the write data mask are swapped. For
details, see the Graphics Operation Function section.
WM14 WM13 WM12 WM11 WM10 WM9 WM8 WM7 WM6
WM4 WM3 WM2 WM1 WM0
R/W
RS
DB7
DB0
DB6
DB5
DB4
DB3
DB2
DB1
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
WM15
WM5
W
1
Figure 18 RAM Write Data Mask Instruction
RAM Address Set (R21h)
AD14–0:
Initially set GRAM addresses to the address counter (AC). Once the GRAM data is written, the AC
is automatically updated according to the AM and I/D bit settings. This allows consecutive accesses without
resetting addresses. Address update range is 0000H-4F33H (GS=0) and 0000H-4F0CH (GS=1). Once the
GRAM data is read, the AC is not automatically updated. GRAM address setting is not allowed in the sleep
mode or standby mode.
AD14 AD13 AD12 AD11 AD10 AD9 AD8
0
0
AD4 AD3 AD2 AD1 AD0
R/W
RS
DB7
DB0
DB6
DB5
DB4
DB3
DB2
DB1
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
0
AD5
W
1
Figure 19 RAM Address Set Instruction
Table 22 GRAM Address Range in Eight-grayscale Mode (GS = 0)
AD14–AD0
GRAM Setting
"0000"H–"0033"H
Bitmap data for COM1
"0100"H–"0133"H
Bitmap data for COM2
"0200"H–"0233"H
Bitmap data for COM3
"0300"H–"0333"H
Bitmap data for COM4
:
:
"AC00"H–"4C33"H
Bitmap data for COM77
"AD00"H–"4D33"H
Bitmap data for COM78
"AE00"H–"4E33"H
Bitmap data for COM79
"AF00"H–"4F33"H
Bitmap data for COM80
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