
HD66705U
4
LCD-II Family Comparison (cont)
Item
Power supply voltage
Liquid crystal drive
voltage
Maximum display
characters per chip
HD66720
2.7V to 5.5V
3.0 to 11.0V
HD66705U
2.4V to 5.5V
3.0 to 9.0V
HD66717
2.4V to 5.5V
3.0 to 13.0V
HD66727
2.4V to 5.5V
3.0 to 13.0V
10 characters
×
1 line/
8 characters
×
2 lines
42 (extended to 80)
12 characters
×
1 line/2 lines
12 characters
×
1 line/2 lines/
3 lines/4 lines
12 characters
×
1 line/2 lines/
3 lines/4 lines
Segment display
40 and
10 annunciators
1/10, 1/18
40 and 10 annunciators
40 and 12
annunciators
Display duty ratio
1/9 and 1/17
1/10, 1/18, 1/26, and
1/34
9,600 bits
(240 5-
×
-8 dot
characters)
32 bytes
60 bytes
8 bytes
60
34
B
1/10, 1/18, 1/26, and
1/34
11,520 bits
(240 6-
×
-8 dot
characters)
32 bytes
60 bytes
8 bytes
60
34
B
CGROM
9,600 bits
(240 5-
×
-8 dot
characters)
64 bytes
40 bytes
16 bytes
42
17
B
9,600 bits
(240 5-
×
-8 dot
characters)
32 bytes
60 bytes
8 bytes
60
18
B
CGRAM
DDRAM
SEGRAM
Segment signals
Common signals
Liquid crystal drive
waveform
Clock source
External resistor
or external clock
160 kHz
±
30%
External resistor
or external clock
1-line: 40 kHz
±
30%
2-line: 85 kHz
±
30%
External resistor
or external clock
1-line: 40 kHz
±
30%
2-line: 85 kHz
±
30%
3-line: 120 kHz
±
30%
4-line: 160 kHz
±
30%
Double or triple
booster circuit
Built-in for each V1
to V5
Internal 1/4 and 1/6 bias
resistors
Incorporated
External resistor
or external clock
1-line: 40 kHz
±
30%
2-line: 85 kHz
±
30%
3-line: 120 kHz
±
30%
4-line: 160 kHz
±
30%
Double or triple
booster circuit
Built-in for each V1
to V5
Internal 1/4 and 1/6
bias resistors
Incorporated
Rf oscillation frequency
Liquid crystal voltage
booster circuit
Liquid crystal drive
operational amplifier
Double or triple
booster circuit
None
Double or triple
booster circuit
Built-in for each V1
to V5
Internal 1/4 bias and
1/5 bias resistors
Incorporated
Bleeder-resistor for liquid
crystal drive
Liquid crystal contrast
adjuster
Key scan circuit
Extension driver control
signal
Reset function
External
None
5
×
6 = 30 keys
Independent
control signal
Internal reset
circuit or reset input
Dot unit and
line unit
Impossible
None
None
None
None
4
×
8 = 32 keys
None
Reset input
Reset input
Reset input
Horizontal smooth scroll
Impossible
Impossible
Impossible
Vertical smooth scroll
Number of displayed lines 1 or 2
Low power control
Dot (raster-row) unit
1 or 2
Standby mode and
sleep mode
Serial, 4, or 8 bits
Dot (raster-row) unit
1, 2, 3, or 4
Standby mode and
sleep mode
I
2
C, serial, 4, or 8 bits
Dot (raster-row) unit
1, 2, 3, or 4
Standby mode and
sleep mode
I
2
C or clock-
synchronized serial
Slim chip
Slim chip with bumps
TCP
Low power mode
and sleep mode
Serial
Bus interface
Package
100-pin QFP1420
100-pin TQFP1414
100-pin bare chip
Slim chip with bumps
TCP
Slim chip
Slim chip with bumps
TCP